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IA64/dist/capstone.min.js

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JavaScript
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feat: interface for debugger and main program
2022-08-17 14:02:23 +02:00
var MCapstone = function(MCapstone) {
MCapstone = MCapstone || {};
var Module = MCapstone;
var Module;if(!Module)Module=(typeof MCapstone!=="undefined"?MCapstone:null)||{};var moduleOverrides={};for(var key in Module){if(Module.hasOwnProperty(key)){moduleOverrides[key]=Module[key]}}var ENVIRONMENT_IS_WEB=false;var ENVIRONMENT_IS_WORKER=false;var ENVIRONMENT_IS_NODE=false;var ENVIRONMENT_IS_SHELL=false;if(Module["ENVIRONMENT"]){if(Module["ENVIRONMENT"]==="WEB"){ENVIRONMENT_IS_WEB=true}else if(Module["ENVIRONMENT"]==="WORKER"){ENVIRONMENT_IS_WORKER=true}else if(Module["ENVIRONMENT"]==="NODE"){ENVIRONMENT_IS_NODE=true}else if(Module["ENVIRONMENT"]==="SHELL"){ENVIRONMENT_IS_SHELL=true}else{throw new Error("The provided Module['ENVIRONMENT'] value is not valid. It must be one of: WEB|WORKER|NODE|SHELL.")}}else{ENVIRONMENT_IS_WEB=typeof window==="object";ENVIRONMENT_IS_WORKER=typeof importScripts==="function";ENVIRONMENT_IS_NODE=typeof process==="object"&&typeof require==="function"&&!ENVIRONMENT_IS_WEB&&!ENVIRONMENT_IS_WORKER;ENVIRONMENT_IS_SHELL=!ENVIRONMENT_IS_WEB&&!ENVIRONMENT_IS_NODE&&!ENVIRONMENT_IS_WORKER}if(ENVIRONMENT_IS_NODE){if(!Module["print"])Module["print"]=console.log;if(!Module["printErr"])Module["printErr"]=console.warn;var nodeFS;var nodePath;Module["read"]=function read(filename,binary){if(!nodeFS)nodeFS=require("fs");if(!nodePath)nodePath=require("path");filename=nodePath["normalize"](filename);var ret=nodeFS["readFileSync"](filename);return binary?ret:ret.toString()};Module["readBinary"]=function readBinary(filename){var ret=Module["read"](filename,true);if(!ret.buffer){ret=new Uint8Array(ret)}assert(ret.buffer);return ret};Module["load"]=function load(f){globalEval(read(f))};if(!Module["thisProgram"]){if(process["argv"].length>1){Module["thisProgram"]=process["argv"][1].replace(/\\/g,"/")}else{Module["thisProgram"]="unknown-program"}}Module["arguments"]=process["argv"].slice(2);if(typeof module!=="undefined"){module["exports"]=Module}process["on"]("uncaughtException",(function(ex){if(!(ex instanceof ExitStatus)){throw ex}}));Module["inspect"]=(function(){return"[Emscripten Module object]"})}else if(ENVIRONMENT_IS_SHELL){if(!Module["print"])Module["print"]=print;if(typeof printErr!="undefined")Module["printErr"]=printErr;if(typeof read!="undefined"){Module["read"]=read}else{Module["read"]=function read(){throw"no read() available"}}Module["readBinary"]=function readBinary(f){if(typeof readbuffer==="function"){return new Uint8Array(readbuffer(f))}var data=read(f,"binary");assert(typeof data==="object");return data};if(typeof scriptArgs!="undefined"){Module["arguments"]=scriptArgs}else if(typeof arguments!="undefined"){Module["arguments"]=arguments}}else if(ENVIRONMENT_IS_WEB||ENVIRONMENT_IS_WORKER){Module["read"]=function read(url){var xhr=new XMLHttpRequest;xhr.open("GET",url,false);xhr.send(null);return xhr.responseText};Module["readAsync"]=function readAsync(url,onload,onerror){var xhr=new XMLHttpRequest;xhr.open("GET",url,true);xhr.responseType="arraybuffer";xhr.onload=function xhr_onload(){if(xhr.status==200||xhr.status==0&&xhr.response){onload(xhr.response)}else{onerror()}};xhr.onerror=onerror;xhr.send(null)};if(typeof arguments!="undefined"){Module["arguments"]=arguments}if(typeof console!=="undefined"){if(!Module["print"])Module["print"]=function print(x){console.log(x)};if(!Module["printErr"])Module["printErr"]=function printErr(x){console.warn(x)}}else{var TRY_USE_DUMP=false;if(!Module["print"])Module["print"]=TRY_USE_DUMP&&typeof dump!=="undefined"?(function(x){dump(x)}):(function(x){})}if(ENVIRONMENT_IS_WORKER){Module["load"]=importScripts}if(typeof Module["setWindowTitle"]==="undefined"){Module["setWindowTitle"]=(function(title){document.title=title})}}else{throw"Unknown runtime environment. Where are we?"}function globalEval(x){eval.call(null,x)}if(!Module["load"]&&Module["read"]){Module["load"]=function load(f){globalEval(Module["read"](f))}}if(!Module["print"]){Module["print"]=(function(){})}if(!Module["printErr"]){Module["printErr"]=Module["print"]}if(!Module["arguments"]){Module["arguments"]=[]}if(!Module["thisProgram"]){Module["thisProgram"]="./this.program"}Module.print=Modul
var asm=(function(global,env,buffer) {
"use asm";var a=new global.Int8Array(buffer);var b=new global.Int16Array(buffer);var c=new global.Int32Array(buffer);var d=new global.Uint8Array(buffer);var e=new global.Uint16Array(buffer);var f=new global.Uint32Array(buffer);var g=new global.Float32Array(buffer);var h=new global.Float64Array(buffer);var i=env.STACKTOP|0;var j=env.STACK_MAX|0;var k=env.DYNAMICTOP_PTR|0;var l=env.tempDoublePtr|0;var m=env.ABORT|0;var n=env.cttz_i8|0;var o=0;var p=0;var q=0;var r=0;var s=global.NaN,t=global.Infinity;var u=0,v=0,w=0,x=0,y=0.0,z=0,A=0,B=0,C=0.0;var D=0;var E=global.Math.floor;var F=global.Math.abs;var G=global.Math.sqrt;var H=global.Math.pow;var I=global.Math.cos;var J=global.Math.sin;var K=global.Math.tan;var L=global.Math.acos;var M=global.Math.asin;var N=global.Math.atan;var O=global.Math.atan2;var P=global.Math.exp;var Q=global.Math.log;var R=global.Math.ceil;var S=global.Math.imul;var T=global.Math.min;var U=global.Math.max;var V=global.Math.clz32;var W=env.abort;var X=env.assert;var Y=env.enlargeMemory;var Z=env.getTotalMemory;var _=env.abortOnCannotGrowMemory;var $=env.invoke_iiii;var aa=env.invoke_vi;var ba=env.invoke_ii;var ca=env.invoke_viii;var da=env.invoke_iiiiiiiii;var ea=env.invoke_iiiii;var fa=env.invoke_iii;var ga=env.invoke_iiiiii;var ha=env.invoke_viiii;var ia=env._pthread_cleanup_pop;var ja=env._llvm_cttz_i64;var ka=env.___lock;var la=env.___syscall6;var ma=env.___setErrNo;var na=env._abort;var oa=env.___syscall140;var pa=env._pthread_cleanup_push;var qa=env._emscripten_memcpy_big;var ra=env.___syscall54;var sa=env.___unlock;var ta=env.___syscall146;var ua=0.0;
// EMSCRIPTEN_START_FUNCS
function gd(b,e,f){b=b|0;e=e|0;f=f|0;var j=0,k=0,m=0,n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0,y=0,z=0,A=0,B=0,C=0,E=0,F=0,G=0,H=0,I=0,J=0,K=0,L=0,M=0,N=0,O=0,P=0,Q=0,R=0,S=0,T=0,U=0,V=0,W=0,X=0,Y=0,Z=0,_=0,$=0,aa=0,ba=0,ca=0,da=0,ea=0,fa=0,ga=0,ha=0,ia=0,ja=0,ka=0,la=0,ma=0,na=0,oa=0,pa=0,qa=0,ra=0,sa=0,ta=0,ua=0,va=0,wa=0,ya=0,za=0,Aa=0,Ba=0,Ca=0,Da=0,Ea=0,Fa=0,Ga=0,Ha=0,Ia=0,Ja=0,Ka=0,La=0,Ma=0,Na=0,Oa=0,Pa=0,Qa=0,Ra=0,Sa=0,Ta=0,Ua=0,Va=0,Wa=0,Xa=0,Ya=0,Za=0,_a=0,$a=0,ab=0,bb=0,cb=0,db=0,eb=0,fb=0,gb=0,hb=0,jb=0,lb=0,mb=0,ob=0,pb=0,rb=0,tb=0,ub=0,vb=0,wb=0,xb=0,yb=0,zb=0,Ab=0,Bb=0,Cb=0,Db=0,Fb=0,Gb=0,Jb=0,Kb=0,Lb=0,Mb=0,Nb=0,Ob=0,Pb=0,Qb=0,Rb=0,Sb=0,Tb=0,Ub=0,Vb=0,Wb=0,Xb=0,Yb=0,Zb=0,_b=0,$b=0,ac=0,bc=0,cc=0,dc=0,ec=0,fc=0,gc=0,hc=0,ic=0,jc=0,kc=0,lc=0,mc=0,nc=0;nc=i;i=i+1216|0;mc=nc+1200|0;lc=nc+1192|0;kc=nc+1184|0;jc=nc+1176|0;Xb=nc+1168|0;Wb=nc+1160|0;ic=nc+1152|0;hc=nc+1144|0;Vb=nc+1136|0;Ub=nc+1128|0;Tb=nc+1120|0;Sb=nc+1112|0;Rb=nc+1104|0;Qb=nc+1096|0;Pb=nc+1088|0;Ob=nc+1080|0;Fb=nc+1072|0;Db=nc+1064|0;Nb=nc+1056|0;Mb=nc+1048|0;Cb=nc+1040|0;Bb=nc+1032|0;Ab=nc+1024|0;zb=nc+1016|0;yb=nc+1008|0;ac=nc+1e3|0;xb=nc+992|0;wb=nc+984|0;vb=nc+976|0;ub=nc+968|0;tb=nc+960|0;$b=nc+952|0;_b=nc+944|0;rb=nc+936|0;pb=nc+928|0;ob=nc+920|0;mb=nc+912|0;cc=nc+904|0;bc=nc+896|0;Zb=nc+888|0;Yb=nc+880|0;lb=nc+872|0;Lb=nc+864|0;Kb=nc+856|0;ec=nc+848|0;dc=nc+840|0;Jb=nc+832|0;Gb=nc+824|0;jb=nc+816|0;hb=nc+808|0;Xa=nc+800|0;Wa=nc+792|0;Za=nc+784|0;Ya=nc+776|0;gc=nc+768|0;fc=nc+760|0;gb=nc+752|0;fb=nc+744|0;cb=nc+736|0;bb=nc+728|0;Va=nc+720|0;Ua=nc+712|0;Ta=nc+704|0;Sa=nc+696|0;ab=nc+688|0;$a=nc+680|0;Ra=nc+672|0;Qa=nc+664|0;db=nc+656|0;_a=nc+648|0;Pa=nc+640|0;za=nc+632|0;ya=nc+624|0;wa=nc+616|0;va=nc+608|0;Ma=nc+600|0;La=nc+592|0;Ga=nc+584|0;Fa=nc+576|0;ua=nc+568|0;ta=nc+560|0;sa=nc+552|0;ra=nc+544|0;qa=nc+536|0;pa=nc+528|0;Oa=nc+520|0;Na=nc+512|0;Ka=nc+504|0;Ja=nc+496|0;Ea=nc+488|0;Da=nc+480|0;oa=nc+472|0;na=nc+464|0;Ia=nc+456|0;Ha=nc+448|0;Ca=nc+440|0;Ba=nc+432|0;ma=nc+424|0;la=nc+416|0;ka=nc+408|0;ja=nc+400|0;ia=nc+392|0;ha=nc+384|0;ga=nc+376|0;fa=nc+368|0;ea=nc+360|0;da=nc+352|0;Aa=nc+344|0;ca=nc+336|0;Y=nc+328|0;X=nc+320|0;W=nc+312|0;V=nc+304|0;U=nc+296|0;T=nc+288|0;S=nc+280|0;aa=nc+272|0;ba=nc+264|0;$=nc+256|0;_=nc+248|0;Z=nc+240|0;P=nc+232|0;O=nc+224|0;N=nc+216|0;L=nc+208|0;J=nc+200|0;M=nc+192|0;K=nc+184|0;I=nc+176|0;H=nc+168|0;G=nc+160|0;F=nc+152|0;E=nc+144|0;C=nc+136|0;B=nc+128|0;A=nc+120|0;z=nc+112|0;y=nc+104|0;x=nc+96|0;w=nc+88|0;v=nc+80|0;u=nc+72|0;t=nc+64|0;s=nc+56|0;r=nc+48|0;q=nc+40|0;p=nc+32|0;o=nc+24|0;n=nc+16|0;m=nc+8|0;k=nc;R=c[160288+((ib(b)|0)<<2)>>2]|0;eb=c[171448+((ib(b)|0)<<2)>>2]|0;Hb(e,1451540+(R&4095)+-1|0);a:do switch(R>>>12&31){case 28:{if(qb(kb(b,1)|0)|0?(Hb(e,1697163),c[(c[b+800>>2]|0)+64>>2]|0):0)a[(c[(c[b+784>>2]|0)+228>>2]|0)+72>>0]=1;break}case 1:{if(qb(kb(b,5)|0)|0?(Hb(e,1697163),c[(c[b+800>>2]|0)+64>>2]|0):0)a[(c[(c[b+784>>2]|0)+228>>2]|0)+72>>0]=1;k=sb(kb(b,3)|0)|0;do switch(k|0){case 15:{Hb(e,1451520);if(!(c[(c[b+800>>2]|0)+64>>2]|0))break a;c[(c[(c[b+784>>2]|0)+228>>2]|0)+68>>2]=0;break a}case 14:break;case 0:{j=1701537;Q=22;break}case 1:{j=1693714;Q=22;break}case 2:{j=1513404;Q=22;break}case 3:{j=1555722;Q=22;break}case 4:{j=1513401;Q=22;break}case 5:{j=1513398;Q=22;break}case 6:{j=1682214;Q=22;break}case 7:{j=1682211;Q=22;break}case 8:{j=1555719;Q=22;break}case 9:{j=1513395;Q=22;break}case 10:{j=1682205;Q=22;break}case 11:{j=1696699;Q=22;break}case 12:{j=1664663;Q=22;break}case 13:{j=1696357;Q=22;break}default:{j=1706095;Q=22}}while(0);if((Q|0)==22)Hb(e,j);if(c[(c[b+800>>2]|0)+64>>2]|0)c[(c[(c[b+784>>2]|0)+228>>2]|0)+68>>2]=k+1;break}case 2:{if(qb(kb(b,6)|0)|0?(Hb(e,1697163),c[(c[b+800>>2]|0)+64>>2]|0):0)a[(c[(c[b+784>>2]|0)+228>>2]|0)+72>>0]=1;k=sb(kb(b,4)|0)|0;do switch(k|0){case 15:{Hb(e,1451520);if(!(c[(c[b+800>>2]|0)+64>>2]|0))break a;c[(c[(c[b+784>>2]|0)+228>>2]|0)+68>>2]=0;break a}case 14:break;case 0:{j=1701537;Q=45;break}case 1:{j=1693714;Q=45;break}case 2:{j=1513404;Q=45;break}case 3:{j=1555722;Q=45;break}case 4:{j=1513401;Q=45;break}case 5:{j=1513398;Q=45;break}case 6:{j=1682214;Q=45;
function Ea(a){a=a|0;var b=0;b=i;i=i+a|0;i=i+15&-16;return b|0}function Fa(){return i|0}function Ga(a){a=a|0;i=a}function Ha(a,b){a=a|0;b=b|0;i=a;j=b}function Ia(a,b){a=a|0;b=b|0;if(!o){o=a;p=b}}function Ja(a){a=a|0;D=a}function Ka(){return D|0}function La(b,d){b=b|0;d=d|0;if(!(a[1706094]|0)){Ud();ze();Xe();vf();Tg();mh();ng();Jh();a[1706094]=1}if(!((b|0)!=0&(d|0)!=0))return 768;c[b>>2]=3;c[d>>2]=0;return 768}function Ma(b){b=b|0;if(!(a[1706094]|0)){Ud();ze();Xe();vf();Tg();mh();ng();Jh();a[1706094]=1}if((b|0)==65535){b=(c[426130]|0)==255;return b|0}if(b>>>0>=8){b=0;return b|0}b=(c[426130]&1<<b|0)!=0;return b|0}function Na(a){a=a|0;if(!a){a=4;return a|0}a=c[a+48>>2]|0;return a|0}function Oa(a){a=a|0;do switch(a|0){case 0:{a=1401007;break}case 1:{a=1401022;break}case 2:{a=1401049;break}case 3:{a=1401084;break}case 4:{a=1401115;break}case 5:{a=1401140;break}case 6:{a=1401167;break}case 7:{a=1401198;break}case 8:{a=1401238;break}case 9:{a=1401296;break}case 10:{a=1401358;break}case 11:{a=1401410;break}default:a=1400988}while(0);return a|0}function Pa(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0;if(!((c[33488]|0)!=0&(c[33489]|0)!=0&(c[33490]|0)!=0&(c[33491]|0)!=0&(c[33492]|0)!=0)){g=8;return g|0}if(!(a[1706094]|0)){Ud();ze();Xe();vf();Tg();mh();ng();Jh();a[1706094]=1}if(b>>>0<8?(f=1704424+(b<<2)|0,c[f>>2]|0):0){g=Ba[c[33489]&31](1,104)|0;if(!g){g=1;return g|0}c[g+48>>2]=0;c[g>>2]=b;c[g+4>>2]=d;a[g+24>>0]=d>>>31;c[g+64>>2]=0;c[g+88>>2]=1401491;b=xa[c[f>>2]&15](g)|0;if(!b){c[e>>2]=g;g=0;return g|0}else{wa[c[33491]&15](g);c[e>>2]=0;g=b;return g|0}}c[e>>2]=0;g=2;return g|0}function Qa(a){a=a|0;var b=0,d=0,e=0;b=c[a>>2]|0;if(!b){a=4;return a|0}d=b;e=c[d+12>>2]|0;if(e|0)wa[c[33491]&15](e);wa[c[33491]&15](c[d+76>>2]|0);d=b;b=d;e=b+104|0;do{c[b>>2]=0;b=b+4|0}while((b|0)<(e|0));wa[c[33491]&15](d);c[a>>2]=0;a=0;return a|0}function Ra(b,d,e){b=b|0;d=d|0;e=e|0;var f=0;if(!(a[1706094]|0)){Ud();ze();Xe();vf();Tg();mh();ng();Jh();a[1706094]=1}if((d|0)==4){f=e;c[33488]=c[e>>2];c[33489]=c[f+4>>2];c[33490]=c[f+8>>2];c[33491]=c[f+12>>2];c[33492]=c[f+16>>2];f=0;return f|0}f=b;if(!b){f=4;return f|0}switch(d|0){case 2:{c[f+64>>2]=e;f=0;return f|0}case 5:{e=(e|0)==3;a[f+84>>0]=e&1;if(!e){f=0;return f|0}d=f+85|0;if(a[d>>0]|0){f=0;return f|0}switch(c[f>>2]|0){case 0:{b=((c[f+4>>2]&16)>>>3^2)+2<<24>>24;break}case 5:case 4:case 2:case 1:{b=4;break}case 6:{b=2;break}case 3:{b=1;break}case 7:{b=2;break}default:b=-1}a[d>>0]=b;f=0;return f|0}case 6:{if(!e){f=0;return f|0}f=f+88|0;c[f>>2]=c[e>>2];c[f+4>>2]=c[e+4>>2];c[f+8>>2]=c[e+8>>2];f=0;return f|0}default:{f=va[c[1704456+(c[f>>2]<<2)>>2]&15](f,d,e)|0;return f|0}}return 0}function Sa(f,g,h,j,k,l,m){f=f|0;g=g|0;h=h|0;j=j|0;k=k|0;l=l|0;m=m|0;var n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0,y=0,z=0,A=0,B=0,C=0,E=0,F=0,G=0,H=0,I=0,J=0,K=0,L=0,M=0,N=0,O=0,P=0,Q=0,R=0,T=0,U=0,V=0,W=0,X=0,Y=0,Z=0,_=0,$=0,aa=0;aa=i;i=i+1360|0;Y=aa+824|0;X=aa+816|0;U=aa;V=aa+1344|0;W=aa+828|0;Z=f;if(!f){m=0;i=aa;return m|0}$=Z+48|0;c[$>>2]=0;if(!(c[Z>>2]|0))c[Z+60>>2]=0;C=(l|0)!=0;p=(l+-1|0)>>>0<32?l:32;r=p*232|0;o=xa[c[33488]&15](r)|0;if(!o){c[$>>2]=1;m=0;i=aa;return m|0}if(h){E=U+800|0;F=U+792|0;G=Z+64|0;H=U+784|0;I=Z+16|0;J=Z+20|0;K=Z+40|0;L=U+8|0;M=Z+8|0;N=Z+12|0;O=Z+44|0;P=Z+84|0;Q=Z+92|0;R=Z+88|0;T=Z+96|0;A=g;B=h;n=o;x=o;o=0;q=0;y=j;z=k;while(1){db(U);c[E>>2]=Z;w=F;c[w>>2]=y;c[w+4>>2]=z;if(!(c[G>>2]|0))c[x+228>>2]=0;else c[x+228>>2]=xa[c[33488]&15](1528)|0;c[H>>2]=x;u=x+8|0;w=u;c[w>>2]=y;c[w+4>>2]=z;if(za[c[I>>2]&15](f,A,B,U,V,y,z,c[J>>2]|0)|0){Gb(W);b[(c[H>>2]|0)+16>>1]=b[V>>1]|0;ya[c[K>>2]&31](Z,x,c[L>>2]|0);ya[c[M>>2]&31](U,W,c[N>>2]|0);s=c[O>>2]|0;w=x+16|0;t=b[w>>1]|0;v=(t&65535)>16?16:t;u=v&65535;Si(x+18|0,A+(t&65535)+(0-u)|0,u|0)|0;b[w>>1]=v;if(jb(U)|0)c[x>>2]=jb(U)|0;if(s|0)Da[s&7](f,x,W,U);s=W;u=x+34|0;a:while(1){t=a[s>>0]|0;switch(t<<24>>24){case 9:case 32:case 0:break a;case 124:{a[s>>0]=32;t=32;break}default:{}}a[u>>0]=t;s=s+1|0;u=u+1|0}a[u>>0]=0;if(!(t<<24>>24))a[x+66>>0]=0;else{b:while(1){s=s+1|0;switch(a[s>>0]|0){case 9:case 32:break;default:break b}}pi(x+66|0,s,159)|0;a[x+225>>0]=0}s=e[V>>1]|0}else{if(c[G>>2]|0)wa[c[
function Hg(b,e,f,g){b=b|0;e=e|0;f=f|0;g=g|0;var h=0,i=0,j=0;i=b+800|0;h=c[i>>2]|0;if((c[h+64>>2]|0)==3){a[h+72>>0]=1;j=c[(c[b+784>>2]|0)+228>>2]|0;h=d[j+56>>0]|0;j=j+60|0;c[j+(h*12|0)>>2]=3;a[j+(h*12|0)+4>>0]=0;c[j+(h*12|0)+8>>2]=0}Ig(b,e,f);if(g|0?(Vh(g,1673456)|0)==0:0){Hb(f,1701106);Ig(b,e+1|0,f);e=c[i>>2]|0;if((c[e+64>>2]|0)!=3)return;a[e+72>>0]=0;j=(c[(c[b+784>>2]|0)+228>>2]|0)+56|0;a[j>>0]=(a[j>>0]|0)+1<<24>>24;return}e=e+1|0;g=kb(b,e)|0;if(nb(g)|0?(qb(g)|0)==71:0){e=c[i>>2]|0;if((c[e+64>>2]|0)!=3)return;a[e+72>>0]=0;j=(c[(c[b+784>>2]|0)+228>>2]|0)+56|0;a[j>>0]=(a[j>>0]|0)+1<<24>>24;return}if(ob(g)|0?(j=sb(g)|0,(j|0)==0&(D|0)==0):0){e=c[i>>2]|0;if((c[e+64>>2]|0)!=3)return;a[e+72>>0]=0;j=(c[(c[b+784>>2]|0)+228>>2]|0)+56|0;a[j>>0]=(a[j>>0]|0)+1<<24>>24;return}Hb(f,1673892);Ig(b,e,f);e=c[i>>2]|0;if((c[e+64>>2]|0)!=3)return;a[e+72>>0]=0;j=(c[(c[b+784>>2]|0)+228>>2]|0)+56|0;a[j>>0]=(a[j>>0]|0)+1<<24>>24;return}function Ig(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0,h=0,j=0,k=0,l=0;l=i;i=i+32|0;j=l+24|0;h=l+16|0;g=l+8|0;f=l;d=kb(b,d)|0;if(nb(d)|0){g=qb(d)|0;Hb(e,1673586);Hb(e,1673588+(c[386668+(g+-1<<2)>>2]|0)|0);e=Og(g)|0;g=c[b+800>>2]|0;if(!(c[g+64>>2]|0)){i=l;return}j=c[(c[b+784>>2]|0)+228>>2]|0;d=j+56|0;f=a[d>>0]|0;h=f&255;j=j+60|0;if(!(a[g+72>>0]|0)){c[j+(h*12|0)>>2]=1;c[j+(h*12|0)+4>>2]=e;a[d>>0]=f+1<<24>>24;i=l;return}f=j+(h*12|0)+4|0;d=e&255;if(!(a[f>>0]|0)){a[f>>0]=d;i=l;return}else{a[j+(h*12|0)+5>>0]=d;i=l;return}}if(!(ob(d)|0)){i=l;return}d=sb(d)|0;switch(c[b+8>>2]|0){case 114:{k=(c[b+792>>2]|0)+(d<<2>>2)|0;break}case 80:case 79:case 78:case 77:case 108:case 107:case 106:case 105:case 92:case 91:case 90:case 89:{k=(c[b+792>>2]|0)+(d<<13>>11)|0;break}case 150:case 149:case 73:case 72:case 71:{k=(c[b+792>>2]|0)+(d<<10>>8)|0;break}case 112:case 111:case 110:case 109:case 104:case 103:case 102:case 101:case 100:case 99:case 98:case 97:case 96:case 95:case 94:case 93:case 88:case 87:case 86:case 85:case 84:case 83:case 82:case 81:{k=(c[b+792>>2]|0)+(d<<16>>14)|0;break}default:k=d}do if((k|0)>-1)if((k|0)>9){c[f>>2]=k;Ib(e,1701249,f);break}else{c[g>>2]=k;Ib(e,1701254,g);break}else{d=0-k|0;if((k|0)<-9){c[h>>2]=d;Ib(e,1701257,h);break}else{c[j>>2]=d;Ib(e,1701263,j);break}}while(0);h=c[b+800>>2]|0;if(!(c[h+64>>2]|0)){i=l;return}e=c[(c[b+784>>2]|0)+228>>2]|0;d=e+56|0;f=a[d>>0]|0;g=f&255;e=e+60|0;if(!(a[h+72>>0]|0)){c[e+(g*12|0)>>2]=2;c[e+(g*12|0)+4>>2]=k;a[d>>0]=f+1<<24>>24;i=l;return}else{c[e+(g*12|0)+8>>2]=k;i=l;return}}function Jg(a,b,d){a=a|0;b=b|0;d=d|0;var e=0;e=sb(kb(a,b)|0)|0;b=e+256|0;switch(ib(a)|0){case 473:case 188:case 472:case 184:case 474:case 210:case 475:case 326:case 476:case 327:case 79:case 80:case 78:case 77:case 150:case 149:{b=(b|0)<272?e+272|0:b;break}default:{}}do switch(b|0){case 264:{e=1693868;break}case 256:{e=1696981;break}case 265:{e=1693714;break}case 257:{e=1693717;break}case 266:{e=1682217;break}case 258:{e=1696357;break}case 267:{e=1682205;break}case 259:{e=1696212;break}case 268:{e=1682208;break}case 260:{e=1682197;break}case 269:{e=1693807;break}case 261:{e=1696018;break}case 270:{e=1682201;break}case 262:{e=1701753;break}case 271:{e=1682211;break}case 263:{e=1682214;break}case 280:{e=1693868;break}case 272:{e=1696981;break}case 279:{e=1682236;break}case 278:{e=1682217;break}case 277:{e=1682227;break}case 276:{e=1696212;break}case 275:{e=1682230;break}case 274:{e=1696398;break}case 273:{e=1693714;break}case 281:{e=1693717;break}case 282:{e=1682233;break}case 283:{e=1682205;break}case 284:{e=1682219;break}case 285:{e=1696357;break}case 286:{e=1682223;break}case 287:{e=1697045;break}default:e=0}while(0);Hb(d,e);if(!(c[(c[a+800>>2]|0)+64>>2]|0))return;c[(c[(c[a+784>>2]|0)+228>>2]|0)+48>>2]=b;return}function Kg(a,b){a=a|0;b=b|0;if(b>>>0>87){b=0;return b|0}b=c[387140+(b<<3)+4>>2]|0;return b|0}function Lg(f,g,h){f=f|0;g=g|0;h=h|0;var i=0,j=0,k=0,l=0,m=0;i=Pb(1337522,441,h,f+76|0)|0;if(!(i<<16>>16))return;l=i&65535;c[g>>2]=e[1337522+(l*46|0)+2>>1];if(!(c[f+64>>2]|0))return;k=g+228|0;f=c[k>>2]|0;i=1337522+(l*46|0)+4|0;b[f>>1]=b[i>>1]|0;b[f+2>>1]=b[i+2>>1]|0;b[f+4>>1]=b[i+4>>1]|0;b[f+6>>1]=b[i+6>>1]
function ce(b,e,f){b=b|0;e=e|0;f=f|0;var g=0,h=0,j=0,k=0,l=0,m=0,n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0;w=i;i=i+32|0;v=w+16|0;u=w+8|0;t=w;a:do switch(ib(b)|0){case 46:{if((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==6:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,5)|0,Db(s,qb(kb(b,1)|0)|0)|0):0){g=1513756;r=3015}else g=0;break}case 48:{if((((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==6:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==0&(D|0)==0):0){g=1513769;r=3015;break a}if((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==6:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0){g=1513780;r=3015;break a}if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==0&(D|0)==0):0){g=1513795;r=3015}else g=0;break}case 49:{if((((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==6:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,8)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==16&(D|0)==0):0){g=1513769;r=3015;break a}if((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==6:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,5)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0){g=1513811;r=3015;break a}if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,8)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==16&(D|0)==0):0){g=1513795;r=3015}else g=0;break}case 50:{if((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,12)|0,Db(s,qb(kb(b,1)|0)|0)|0):0){g=1513756;r=3015}else g=0;break}case 52:{if((((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==0&(D|0)==0):0){g=1513769;r=3015;break a}if((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0){g=1513780;r=3015;break a}if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==0&(D|0)==0):0){g=1513795;r=3015}else g=0;break}case 53:{if((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,12)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,4)|0,Db(s,qb(kb(b,2)|0)|0)|0):0){g=1513811;r=3015}else g=0;break}case 54:{if((((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,15)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==24&(D|0)==0):0){g=1513769;r=3015;break a}if((((((lb(b)|0)==4?(qb(kb(b,0)|0)|0)==7:0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,12)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0){g=1513811;r=3015;break a}if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,15)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?nb(kb(b,2)|0)|0:0)?(s=Fb(f,11)|0,Db(s,qb(kb(b,2)|0)|0)|0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==24&(D|0)==0):0){g=1513795;r=3015}else g=0;break}case 60:{if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,8)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,5)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?ob(kb(b,2)|0)|0:0)?(s=sb(kb(b,2)|0)|0,(s|0)==0&(D|0)==0):0)?ob(kb(b,3)|0)|0:0)?(s=sb(kb(b,3)|0)|0,(s|0)==0&(D|0)==0):0){g=1513826;r=3015;break a}if(((((((((lb(b)|0)==4?nb(kb(b,0)|0)|0:0)?(s=Fb(f,5)|0,Db(s,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(s=Fb(f,8)|0,Db(s,qb(kb(b,1)|0)|0)|0):0)?ob(k
function Df(f,g,h,j,k,l){f=f|0;g=g|0;h=h|0;j=j|0;k=k|0;l=l|0;var m=0,n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0,y=0,z=0,A=0,B=0,C=0,E=0,F=0,G=0,H=0,I=0,J=0,K=0,L=0,M=0,N=0,O=0,P=0,Q=0,R=0,S=0,T=0,U=0,V=0,W=0,X=0,Y=0,Z=0,_=0,$=0,aa=0,ba=0,ca=0,da=0,ea=0,fa=0,ga=0,ha=0;fa=i;i=i+16|0;W=fa+2|0;Y=fa;L=fa+5|0;K=fa+4|0;O=f+148|0;c[O>>2]=g;N=f+152|0;c[N>>2]=h;ca=f+184|0;da=ca;c[da>>2]=j;c[da+4>>2]=k;da=f+160|0;ba=da;c[ba>>2]=j;c[ba+4>>2]=k;ba=f+176|0;c[ba>>2]=l;a[W>>0]=0;p=f+141|0;_=f+14|0;q=f+15|0;$=f+13|0;aa=f+1|0;r=f+5|0;s=f+16|0;t=f+6|0;u=f+24|0;v=f+7|0;w=f+32|0;x=f+8|0;y=f+40|0;z=f+9|0;A=f+48|0;B=f+10|0;C=f+56|0;X=f+11|0;P=f+64|0;Q=f+12|0;R=f+72|0;E=f+80|0;S=f+88|0;T=f+96|0;F=f+108|0;G=f+2|0;H=f+3|0;I=f+4|0;J=r+1|0;o=0;M=0;g=l;a:while(1){b:do if((g|0)==2){l=da;if(Aa[c[O>>2]&3](c[N>>2]|0,W,c[l>>2]|0,c[l+4>>2]|0)|0)break a;h=da;g=c[h>>2]|0;h=c[h+4>>2]|0;j=Ji(g|0,h|0,1,0)|0;k=D;l=da;c[l>>2]=j;c[l+4>>2]=k;if((a[W>>0]&-16)<<24>>24!=64){l=da;c[l>>2]=g;c[l+4>>2]=h;break}if(Aa[c[O>>2]&3](c[N>>2]|0,W,j,k)|0)break a;while(1){g=a[W>>0]|0;if((g&-16)<<24>>24!=64)break;l=da;if(Aa[c[O>>2]&3](c[N>>2]|0,W,c[l>>2]|0,c[l+4>>2]|0)|0)break a;k=da;k=Ji(c[k>>2]|0,c[k+4>>2]|0,1,0)|0;l=D;j=da;c[j>>2]=k;c[j+4>>2]=l;if(Aa[c[O>>2]&3](c[N>>2]|0,W,k,l)|0)break a}switch(g<<24>>24){case 103:case 102:case 101:case 100:case 38:case 62:case 54:case 46:case -16:case -13:case -14:break b;default:{}}k=da;k=Ji(c[k>>2]|0,c[k+4>>2]|0,-1,-1)|0;l=da;c[l>>2]=k;c[l+4>>2]=D}while(0);l=da;k=c[l>>2]|0;l=c[l+4>>2]|0;if(Aa[c[O>>2]&3](c[N>>2]|0,W,k,l)|0)break;ga=da;ha=c[ga>>2]|0;ga=c[ga+4>>2]|0;h=Ji(ha|0,ga|0,1,0)|0;j=D;g=da;c[g>>2]=h;c[g+4>>2]=j;g=ca;if((ha|0)==(c[g>>2]|0)?(ga|0)==(c[g+4>>2]|0):0){g=a[W>>0]|0;if((g&-2)<<24>>24==-14){if(Aa[c[O>>2]&3](c[N>>2]|0,Y,h,j)|0)break;g=a[W>>0]|0;c:do if((g&-2)<<24>>24==-14){h=a[Y>>0]|0;ha=h&255;if(h<<24>>24==-16|((ha&254|0)==134|(ha&248|0)==144))a[p>>0]=1;if(g<<24>>24==-13){switch(h<<24>>24){case -57:case -58:case -119:case -120:break;default:break c}a[p>>0]=1}}while(0);if((c[ba>>2]|0)==2?(a[Y>>0]&-16)<<24>>24==64:0){ha=da;if(Aa[c[O>>2]&3](c[N>>2]|0,Y,c[ha>>2]|0,c[ha+4>>2]|0)|0)break;ga=da;ga=Ji(c[ga>>2]|0,c[ga+4>>2]|0,1,0)|0;ha=D;j=da;c[j>>2]=ga;c[j+4>>2]=ha;if(Aa[c[O>>2]&3](c[N>>2]|0,Y,ga,ha)|0)break;ha=da;ha=Ji(c[ha>>2]|0,c[ha+4>>2]|0,-1,-1)|0;Z=da;c[Z>>2]=ha;c[Z+4>>2]=D;Z=27}else Z=27}}else Z=27;if((Z|0)==27){Z=0;g=a[W>>0]|0}switch(g<<24>>24){case -16:case -13:case -14:{a[_>>0]=0;a[q>>0]=0;a[$>>0]=0;switch(g<<24>>24){case -14:{a[_>>0]=1;ha=S;c[ha>>2]=k;c[ha+4>>2]=l;break}case -13:{a[q>>0]=1;ha=T;c[ha>>2]=k;c[ha+4>>2]=l;break}case -16:{a[$>>0]=1;ha=E;c[ha>>2]=k;c[ha+4>>2]=l;break}default:{}}a[aa>>0]=g;g=M;break}case 46:{c[F>>2]=1;a[r>>0]=0;a[r+1>>0]=0;a[r+2>>0]=0;a[r+3>>0]=0;a[r+4>>0]=0;a[r+5>>0]=0;a[t>>0]=1;g=u;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=46;g=M;break}case 54:{c[F>>2]=2;a[r>>0]=0;a[r+1>>0]=0;a[r+2>>0]=0;a[r+3>>0]=0;a[r+4>>0]=0;a[r+5>>0]=0;a[v>>0]=1;g=w;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=54;g=M;break}case 62:{c[F>>2]=3;a[r>>0]=0;a[r+1>>0]=0;a[r+2>>0]=0;a[r+3>>0]=0;a[r+4>>0]=0;a[r+5>>0]=0;a[x>>0]=1;g=y;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=62;g=M;break}case 38:{c[F>>2]=4;a[J>>0]=0;a[J+1>>0]=0;a[J+2>>0]=0;a[J+3>>0]=0;a[J+4>>0]=0;a[r>>0]=1;g=s;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=38;g=M;break}case 100:{c[F>>2]=5;a[r>>0]=0;a[r+1>>0]=0;a[r+2>>0]=0;a[r+3>>0]=0;a[r+4>>0]=0;a[r+5>>0]=0;a[z>>0]=1;g=A;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=100;g=M;break}case 101:{c[F>>2]=6;a[r>>0]=0;a[r+1>>0]=0;a[r+2>>0]=0;a[r+3>>0]=0;a[r+4>>0]=0;a[B>>0]=1;g=C;c[g>>2]=k;c[g+4>>2]=l;a[G>>0]=101;g=M;break}case 102:{a[X>>0]=1;o=P;c[o>>2]=k;c[o+4>>2]=l;a[H>>0]=102;o=1;g=M;break}case 103:{a[Q>>0]=1;g=R;c[g>>2]=k;c[g+4>>2]=l;a[I>>0]=103;g=1;break}default:{Z=43;break a}}M=g;g=c[ba>>2]|0}d:do if((Z|0)==43){y=f+196|0;c[y>>2]=0;e:do switch(g<<24>>24){case 98:{ha=da;if(Aa[c[O>>2]&3](c[N>>2]|0,L,c[ha>>2]|0,c[ha+4>>2]|0)|0)break d;h=da;g=c[h>>2]|0;h=c[h+4>>2]|0;j=Ji(g|0,h|0,1,0)|0;k=D;ha=da;c[ha>>2]=j;c[ha+4>>2]=k;ha=a[L>>0]|0;do if(((c[ba>>2]|0)==2|(ha&255)>191)&(ha&12)==0){if(Aa[c[O>>2]&3](c[N>>2]|0,K,j,k)|0)break d;if(!(a[K>>0]&4)){ga=da;ha=c[ga>>2]|0;ga=c[ga+4>>2]|0;g=Ji(ha|0,ga|0,-2,-1)|0
function de(b,e,f){b=b|0;e=e|0;f=f|0;var j=0,k=0,m=0.0,n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0,y=0,z=0,A=0,B=0,C=0,E=0;B=i;i=i+224|0;z=B+80|0;y=B+72|0;u=B+64|0;p=B+56|0;o=B+48|0;n=B+40|0;s=B+32|0;q=B+24|0;v=B+16|0;t=B+8|0;k=B;w=B+216|0;r=B+88|0;x=c[205844+((ib(b)|0)<<2)>>2]|0;A=c[215400+((ib(b)|0)<<2)>>2]|0;Hb(e,1510539+(x&4095)+-1|0);do switch(x>>>12&63){case 39:{fe(b,0,e,0,98,f);ge(b,1,e);Hb(e,1673462);j=b+800|0;k=c[j>>2]|0;if((c[k+64>>2]|0)==3){a[k+72>>0]=1;z=c[(c[b+784>>2]|0)+228>>2]|0;A=d[z+48+6>>0]|0;z=z+56|0;c[z+(A*48|0)+24>>2]=3;y=z+(A*48|0)+32|0;c[y>>2]=0;c[y+4>>2]=0;c[z+(A*48|0)+40>>2]=0}ee(b,2,e);Hb(e,1701109);j=c[j>>2]|0;if((c[j+64>>2]|0)!=3){i=B;return}a[j+72>>0]=0;b=(c[(c[b+784>>2]|0)+228>>2]|0)+48+6|0;a[b>>0]=(a[b>>0]|0)+1<<24>>24;i=B;return}case 1:{j=qb(kb(b,0)|0)|0;Hb(e,1513267+(c[224956+(j+-1<<2)>>2]|0)|0);if(c[(c[b+800>>2]|0)+64>>2]|0){C=b+784|0;E=c[(c[C>>2]|0)+228>>2]|0;c[E+56+((d[E+48+6>>0]|0)*48|0)+24>>2]=1;E=ue(j)|0;C=c[(c[C>>2]|0)+228>>2]|0;k=C+48+6|0;j=a[k>>0]|0;c[C+56+((j&255)*48|0)+32>>2]=E;a[k>>0]=j+1<<24>>24}break}case 2:{ee(b,0,e);break}case 3:{j=qb(kb(b,1)|0)|0;Hb(e,1513267+(c[224956+(j+-1<<2)>>2]|0)|0);if(c[(c[b+800>>2]|0)+64>>2]|0){k=b+784|0;E=c[(c[k>>2]|0)+228>>2]|0;c[E+56+((d[E+48+6>>0]|0)*48|0)+24>>2]=1;j=ue(j)|0;k=c[(c[k>>2]|0)+228>>2]|0;E=k+48+6|0;C=a[E>>0]|0;c[k+56+((C&255)*48|0)+32>>2]=j;a[E>>0]=C+1<<24>>24}break}case 4:{j=kb(b,0)|0;if(!(ob(j)|0)){i=B;return}k=b+792|0;j=Ji(Mi(sb(j)|0,D|0,2)|0,D|0,c[k>>2]|0,c[k+4>>2]|0)|0;k=D;Kb(e,j,k);if(!(c[(c[b+800>>2]|0)+64>>2]|0)){i=B;return}e=c[(c[b+784>>2]|0)+228>>2]|0;E=e+48+6|0;C=a[E>>0]|0;b=C&255;e=e+56|0;c[e+(b*48|0)+24>>2]=2;b=e+(b*48|0)+32|0;c[b>>2]=j;c[b+4>>2]=k;a[E>>0]=C+1<<24>>24;i=B;return}case 5:{j=kb(b,0)|0;E=k;c[E>>2]=sb(j)|0;c[E+4>>2]=D;Ib(e,1513385,k);if(!(c[(c[b+800>>2]|0)+64>>2]|0)){i=B;return}b=b+784|0;e=c[(c[b>>2]|0)+228>>2]|0;c[e+56+((d[e+48+6>>0]|0)*48|0)+24>>2]=2;e=Hi(0,sb(j)|0,32)|0;b=c[(c[b>>2]|0)+228>>2]|0;E=b+48+6|0;C=a[E>>0]|0;b=b+56+((C&255)*48|0)+32|0;c[b>>2]=e;c[b+4>>2]=D;a[E>>0]=C+1<<24>>24;i=B;return}case 6:{k=sb(kb(b,0)|0)|0;do switch(k|0){case 0:{j=1701537;break}case 1:{j=1693714;break}case 2:{j=1513404;break}case 3:{j=1555722;break}case 4:{j=1513401;break}case 5:{j=1513398;break}case 6:{j=1682214;break}case 7:{j=1682211;break}case 8:{j=1555719;break}case 9:{j=1513395;break}case 10:{j=1682205;break}case 11:{j=1696699;break}case 12:{j=1664663;break}case 13:{j=1696357;break}case 14:{j=1693954;break}case 15:{j=1513392;break}default:j=0}while(0);Hb(e,j);f=b+800|0;if(c[(c[f>>2]|0)+64>>2]|0)c[(c[(c[b+784>>2]|0)+228>>2]|0)+48>>2]=k+1;Hb(e,1693550);j=kb(b,1)|0;if(!(ob(j)|0)){i=B;return}k=b+792|0;j=Ji(Mi(sb(j)|0,D|0,2)|0,D|0,c[k>>2]|0,c[k+4>>2]|0)|0;k=D;Kb(e,j,k);if(!(c[(c[f>>2]|0)+64>>2]|0)){i=B;return}e=c[(c[b+784>>2]|0)+228>>2]|0;E=e+48+6|0;C=a[E>>0]|0;b=C&255;e=e+56|0;c[e+(b*48|0)+24>>2]=2;b=e+(b*48|0)+32|0;c[b>>2]=j;c[b+4>>2]=k;a[E>>0]=C+1<<24>>24;i=B;return}case 7:{k=sb(kb(b,0)|0)|0;if((ib(b)|0)==728)j=Yd(188236,k,w)|0;else j=Yd(188128,k,w)|0;if(!(a[w>>0]|0)){Ob(e,k);if(c[(c[b+800>>2]|0)+64>>2]|0){e=c[(c[b+784>>2]|0)+228>>2]|0;E=e+48+6|0;C=a[E>>0]|0;b=C&255;e=e+56|0;c[e+(b*48|0)+24>>2]=2;b=e+(b*48|0)+32|0;c[b>>2]=k;c[b+4>>2]=0;a[E>>0]=C+1<<24>>24}}else{Hb(e,j);if(c[(c[b+800>>2]|0)+64>>2]|0){E=b+784|0;b=c[(c[E>>2]|0)+228>>2]|0;C=d[b+48+6>>0]|0;b=b+56|0;c[b+(C*48|0)+24>>2]=70;c[b+(C*48|0)+32>>2]=k;E=(c[(c[E>>2]|0)+228>>2]|0)+48+6|0;a[E>>0]=(a[E>>0]|0)+1<<24>>24}}i=B;return}case 8:{ee(b,1,e);break}case 9:{fe(b,0,e,16,98,f);Hb(e,1673462);j=b+800|0;k=c[j>>2]|0;if((c[k+64>>2]|0)==3){a[k+72>>0]=1;C=c[(c[b+784>>2]|0)+228>>2]|0;E=d[C+48+6>>0]|0;C=C+56|0;c[C+(E*48|0)+24>>2]=3;A=C+(E*48|0)+32|0;c[A>>2]=0;c[A+4>>2]=0;c[C+(E*48|0)+40>>2]=0}ee(b,1,e);Hb(e,1701109);j=c[j>>2]|0;if((c[j+64>>2]|0)!=3){i=B;return}a[j+72>>0]=0;E=(c[(c[b+784>>2]|0)+228>>2]|0)+48+6|0;a[E>>0]=(a[E>>0]|0)+1<<24>>24;i=B;return}case 10:{fe(b,1,e,16,98,f);Hb(e,1673462);j=b+800|0;k=c[j>>2]|0;if((c[k+64>>2]|0)==3){a[k+72>>0]=1;C=c[(c[b+784>>2]|0)+228>>2]|0;E=d[C+48+6>>0]|0;C=C+56|0;c[C+(E*48|0)+24>>2]=3;k=C+(E*48|0)+32|0;c[k>>2]=0;c[k+4>>2]=0;c[C+(E*48
function hf(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0,h=0,j=0,k=0;k=i;i=i+16|0;j=k;a:do switch(ib(b)|0){case 116:{if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==12&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1579933;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==12&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1579946;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==14&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1579955;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==14&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1579969;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==15&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1579979;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==15&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1579993;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==44&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580003;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==44&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580016;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==46&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580025;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==46&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580039;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==47&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580049;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==47&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580063;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==76&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580073;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==76&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580086;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==78&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580095;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==78&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580109;break a}do if((lb(b)|0)==3?ob(kb(b,0)|0)|0:0){h=sb(kb(b,0)|0)|0;if(!((h|0)==79&(D|0)==0))break;if(!(nb(kb(b,1)|0)|0))break;h=Fb(e,5)|0;if(Db(h,qb(kb(b,1)|0)|0)|0){e=1580119;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==79&(D|0)==0))break;if((qb(kb(b,1)|0)|0)==11){e=1580133;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==68&(D|0)==0))break;if(!(nb(kb(b,1)|0)|0))break;h=Fb(e,5)|0;if(Db(h,qb(kb(b,1)|0)|0)|0){e=1580143;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==68&(D|0)==0))break;if((qb(kb(b,1)|0)|0)==11){e=1580156;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==70&(D|0)==0))break;if(!(nb(kb(b,1)|0)|0))break;h=Fb(e,5)|0;if(Db(h,qb(kb(b,1)|0)|0)|0){e=1580165;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==70&(D|0)==0))break;if((qb(kb(b,1)|0)|0)==11){e=1580179;break a}}while(0);do if((lb(b)|0)==3){if(!(ob(kb(b,0)|0)|0))break;h=sb(kb(b,0)|0)|0;if(!((h|0)==71&(D|0)==0))break;if(!(nb(kb(b,1)|0)|0))break;h=Fb(e,5)|0;if(Db(h,qb(kb(b,1)|0)|0)|0){e=1580189;break a}}while(0);if((lb(b)|0)!=3){j=0;i=k;return j|0}if(!(ob(kb(b,0)|0)|0)){j=0;i=k;return j|0}if(!((sb(kb(b,0)|0)|0)==71&(D|0)==0)){j=0;i=k;return j|0}if((qb(kb(b,1)|0)|0)==11){e=1580203;break a}else e=0;i=k;return e|0}case 117:{if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==12&(D|0)==0):0)?nb(kb(b,1)|0)|0:0)?(h=Fb(e,5)|0,Db(h,qb(kb(b,1)|0)|0)|0):0){e=1580213;break a}if((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?(h=sb(kb(b,0)|0)|0,(h|0)==12&(D|0)==0):0)?(qb(kb(b,1)|0)|0)==11:0){e=1580227;break a}if(((((lb(b)|0)==3?ob(kb(b,0)|0)|0:0)?
function zc(a,b){a=a|0;b=b|0;var c=0,d=0,f=0;c=b>>>12&15|b>>>18&16;d=b>>>16&15;f=b&15;a:do switch(ib(a)|0){case 995:case 994:case 992:case 991:case 989:case 988:case 993:case 990:case 987:case 924:case 923:case 921:case 920:case 918:case 917:case 915:case 914:case 922:case 919:case 916:case 913:if((c|0)==31){f=0;return f|0}else{wb(a,e[418546+(c<<1)>>1]|0);break a}case 986:case 985:case 983:case 982:case 980:case 979:case 984:case 981:case 978:if(c>>>0>29){f=0;return f|0}else{wb(a,e[418608+(c<<1)>>1]|0);break a}default:wb(a,e[418386+(c<<1)>>1]|0)}while(0);switch(ib(a)|0){case 1208:case 1204:case 1212:case 1205:case 1201:case 1209:case 1092:case 1088:case 1096:case 1089:case 1085:case 1093:{wb(a,e[418386+((c+1&31)<<1)>>1]|0);break}case 1229:case 1224:case 1234:case 1227:case 1222:case 1232:case 1113:case 1108:case 1118:case 1111:case 1106:case 1116:{wb(a,e[418386+((c+2&31)<<1)>>1]|0);break}default:{}}switch(ib(a)|0){case 1208:case 1204:case 1212:case 1205:case 1201:case 1209:case 1092:case 1088:case 1096:case 1089:case 1085:case 1093:{wb(a,e[418386+((c+2&31)<<1)>>1]|0);break}case 1229:case 1224:case 1234:case 1227:case 1222:case 1232:case 1113:case 1108:case 1118:case 1111:case 1106:case 1116:{wb(a,e[418386+((c+4&31)<<1)>>1]|0);break}default:{}}switch(ib(a)|0){case 1208:case 1204:case 1212:case 1205:case 1201:case 1209:{wb(a,e[418386+((c+3&31)<<1)>>1]|0);break}case 1229:case 1224:case 1234:case 1227:case 1222:case 1232:{wb(a,e[418386+((c+6&31)<<1)>>1]|0);break}default:{}}switch(ib(a)|0){case 983:case 980:case 986:case 982:case 979:case 985:case 1007:case 1001:case 1013:case 992:case 989:case 995:case 1006:case 1e3:case 1012:case 991:case 988:case 994:case 895:case 894:case 883:case 882:case 874:case 873:case 907:case 906:case 901:case 900:case 886:case 885:case 877:case 876:case 910:case 909:case 921:case 918:case 915:case 924:case 920:case 917:case 914:case 923:case 903:case 888:case 879:case 912:case 902:case 887:case 878:case 911:{yb(a,0,0);break}case 1229:case 1224:case 1234:case 1208:case 1204:case 1212:case 1113:case 1108:case 1118:case 1092:case 1088:case 1096:{wb(a,e[418354+(d<<1)>>1]|0);break}default:{}}c=b>>>4&3;wb(a,e[418354+(d<<1)>>1]|0);if(!c)yb(a,0,0);else yb(a,4<<c,0);b:do switch(ib(a)|0){case 921:case 918:case 915:case 924:case 920:case 917:case 914:case 923:case 903:case 888:case 879:case 912:case 894:case 882:case 873:case 906:case 900:case 885:case 876:case 909:case 902:case 887:case 878:case 911:{switch(b&15){case 13:case 15:{c=3;break}default:break b}return c|0}case 1006:case 1e3:case 1012:case 982:case 979:case 985:case 991:case 988:case 994:{f=3;return f|0}default:{switch(b&15){case 13:break;case 15:{f=3;return f|0}default:break b}wb(a,0);f=3;return f|0}}while(0);wb(a,e[418354+(f<<1)>>1]|0);f=3;return f|0}function Ac(a,b){a=a|0;b=b|0;var c=0,d=0,f=0,g=0;d=b>>>12&15|b>>>18&16;f=b>>>16&15;g=b&15;a:do switch(ib(a)|0){case 1981:case 1978:case 1984:case 1980:case 1977:case 1983:case 2005:case 1999:case 2011:case 2004:case 1998:case 2010:case 1990:case 1987:case 1993:case 1989:case 1986:case 1992:case 1911:case 1899:case 1890:case 1923:case 1910:case 1898:case 1889:case 1922:case 1917:case 1902:case 1893:case 1926:case 1916:case 1901:case 1892:case 1925:case 1937:case 1934:case 1931:case 1940:case 1936:case 1933:case 1930:case 1939:case 1919:case 1904:case 1895:case 1928:case 1918:case 1903:case 1894:case 1927:if((g|0)==15){g=0;return g|0}else{yb(a,0,0);break a}case 2155:case 2150:case 2160:case 2134:case 2130:case 2138:case 2075:case 2070:case 2080:case 2054:case 2050:case 2058:{wb(a,e[418354+(f<<1)>>1]|0);break}default:{}}while(0);c=b>>>4&3;wb(a,e[418354+(f<<1)>>1]|0);if(!c)yb(a,0,0);else yb(a,4<<c,0);b:do switch(ib(a)|0){case 1980:case 1977:case 1983:case 2004:case 1998:case 2010:case 1989:case 1986:case 1992:case 1910:case 1898:case 1889:case 1922:case 1916:case 1901:case 1892:case 1925:case 1936:case 1933:case 1930:case 1939:case 1918:case 1903:case 1894:case 1927:break;default:switch(b&15){case 15:break b;case 13:{wb(a,0);break b}default:{wb(a,e[418354+(g<<1)>>1]|0);break b}}}while(0);c:do switch(ib
function Gg(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0,h=0,j=0,k=0,l=0,m=0;k=i;i=i+16|0;j=k;a:do switch(ib(b)|0){case 72:{if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==8&(D|0)==0):0){e=1673894;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==0&(D|0)==0):0){e=1673900;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==9&(D|0)==0):0){e=1673906;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==1&(D|0)==0):0){e=1673913;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==10&(D|0)==0):0){e=1673919;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==2&(D|0)==0):0){e=1673925;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==11&(D|0)==0):0){e=1673932;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==3&(D|0)==0):0){e=1673939;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==12&(D|0)==0):0){e=1673945;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==4&(D|0)==0):0){e=1673952;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==13&(D|0)==0):0){e=1673960;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==5&(D|0)==0):0){e=1673967;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==14&(D|0)==0):0){e=1673974;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==6&(D|0)==0):0){e=1673982;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==15&(D|0)==0):0){e=1673990;break a}if((lb(b)|0)!=2){j=0;i=k;return j|0}if(!(ob(kb(b,1)|0)|0)){j=0;i=k;return j|0}if((sb(kb(b,1)|0)|0)==7&(D|0)==0)e=1673997;else{j=0;i=k;return j|0}break}case 73:{if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==8&(D|0)==0):0){e=1674004;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==0&(D|0)==0):0){e=1674012;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==9&(D|0)==0):0){e=1674020;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==1&(D|0)==0):0){e=1674029;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==10&(D|0)==0):0){e=1674037;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==2&(D|0)==0):0){e=1674045;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==11&(D|0)==0):0){e=1674054;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==3&(D|0)==0):0){e=1674063;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==12&(D|0)==0):0){e=1674071;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==4&(D|0)==0):0){e=1674080;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==13&(D|0)==0):0){e=1674090;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==5&(D|0)==0):0){e=1674099;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==14&(D|0)==0):0){e=1674108;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==6&(D|0)==0):0){e=1674118;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==15&(D|0)==0):0){e=1674128;break a}if((lb(b)|0)!=2){j=0;i=k;return j|0}if(!(ob(kb(b,1)|0)|0)){j=0;i=k;return j|0}if((sb(kb(b,1)|0)|0)==7&(D|0)==0)e=1674137;else{j=0;i=k;return j|0}break}case 79:{if(((((lb(b)|0)==3?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==0&(D|0)==0):0)?nb(kb(b,2)|0)|0:0)?(h=Fb(e,0)|0,Db(h,qb(kb(b,2)|0)|0)|0):0){e=1674146;break a}if(((((lb(b)|0)==3?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==8&(D|0)==0):0)?nb(kb(b,2)|0)|0:0)?(h=Fb(e,0)|0,Db(h,qb(kb(b,2)|0)|0)|0):0){e=1674162;break a}if(((((lb(b)|0)==3?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==7&(D|0)==0):0)?nb(kb(b,2)|0)|0:0)?(h=Fb(e,0)|0,Db(h,qb(kb(b,2)|0)|0)|0):0){e=1674178;break a}if(((((lb(b)|0)==3?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==6&(D|0)==0):0)?nb(kb(b,2)|0)|0:0)?(h=Fb(e,0)|0,Db(h,qb(kb(b,2)|0)|0)|0):0){e=1674194;break a}if(((((lb(b)|0)==3?ob(kb(b,1)|0)|0:0)?(h=sb(kb(b,1)|0)|0,(h|0)==5&(D|0)==0):0)?nb(kb(b,2)|0)|0:0)?(h=Fb(e,0)|0,Db(h,qb(kb(b,2)|0)|0)|0):0){e=1674210;break a}if(((((lb(b)
function $d(b,d,e,f){b=b|0;d=d|0;e=e|0;f=f|0;var g=0,h=0,j=0,k=0,l=0,m=0;m=i;i=i+144|0;g=m+128|0;h=m;do switch(d|0){case 329:{wb(f,c[193456+((e&31)<<2)>>2]|0);l=e>>>5&31;wb(f,(l|0)==31?4:c[193200+(l<<2)>>2]|0);wb(f,c[193200+((e>>>16&31)<<2)>>2]|0);yb(f,e>>>15&1,0);yb(f,e>>>12&1,0);f=b;i=m;return f|0}case 1:{j=e&31;k=e>>>5&31;l=e>>>16&31;g=e>>>22&3;d=e>>>10;h=g<<6|d&63;switch(ib(f)|0){case 1949:case 1958:case 48:case 62:{if((g|0)==3|(d&32|0)!=0){f=0;i=m;return f|0}else e=18;break}case 289:case 294:case 1152:case 1159:case 105:case 109:case 87:case 93:{if(!(d&32))e=18;else{f=0;i=m;return f|0}break}case 1953:case 1962:case 52:case 66:{if((g|0)==3){f=0;i=m;return f|0}else e=20;break}case 291:case 297:case 1154:case 1162:case 107:case 111:case 90:case 96:{e=20;break}default:{f=0;i=m;return f|0}}if((e|0)==18){wb(f,c[193072+(j<<2)>>2]|0);wb(f,c[193072+(k<<2)>>2]|0);wb(f,c[193072+(l<<2)>>2]|0)}else if((e|0)==20){wb(f,c[193200+(j<<2)>>2]|0);wb(f,c[193200+(k<<2)>>2]|0);wb(f,c[193200+(l<<2)>>2]|0)}yb(f,h,0);f=b;i=m;return f|0}case 2:{l=e>>>10;g=l&63;if((l&7)>>>0>4){f=0;i=m;return f|0}h=e&31;j=e>>>5&31;d=e>>>16&31;switch(ib(f)|0){case 1959:case 63:{wb(f,(h|0)==31?5:c[193072+(h<<2)>>2]|0);wb(f,(j|0)==31?5:c[193072+(j<<2)>>2]|0);wb(f,c[193072+(d<<2)>>2]|0);break}case 1950:case 49:{wb(f,c[193072+(h<<2)>>2]|0);wb(f,(j|0)==31?5:c[193072+(j<<2)>>2]|0);wb(f,c[193072+(d<<2)>>2]|0);break}case 1963:case 67:{wb(f,(h|0)==31?4:c[193200+(h<<2)>>2]|0);wb(f,(j|0)==31?4:c[193200+(j<<2)>>2]|0);wb(f,c[193072+(d<<2)>>2]|0);break}case 1954:case 53:{wb(f,c[193200+(h<<2)>>2]|0);wb(f,(j|0)==31?4:c[193200+(j<<2)>>2]|0);wb(f,c[193072+(d<<2)>>2]|0);break}case 1964:case 68:{wb(f,(h|0)==31?4:c[193200+(h<<2)>>2]|0);wb(f,(j|0)==31?4:c[193200+(j<<2)>>2]|0);wb(f,c[193200+(d<<2)>>2]|0);break}case 54:case 1955:{wb(f,c[193200+(h<<2)>>2]|0);wb(f,(j|0)==31?4:c[193200+(j<<2)>>2]|0);wb(f,c[193200+(d<<2)>>2]|0);break}default:{f=0;i=m;return f|0}}yb(f,g,0);f=b;i=m;return f|0}case 3:{j=e&31;k=e>>>5&31;l=e>>>10&31;g=e>>>15;h=(e&4194304|0)!=0;d=ib(f)|0;g=(g&64|0)==0?g&127:g|-128;switch(d|0){case 1870:case 957:case 1869:case 956:case 1864:case 948:case 1863:case 947:case 1867:case 951:case 1866:case 950:case 1873:case 960:case 1872:case 959:case 954:case 1876:case 963:case 953:case 1875:case 962:{e=32;break}case 952:case 1874:case 961:case 1861:case 945:{d=0;e=34;break}case 1871:case 958:case 1860:case 944:{d=0;e=36;break}case 1865:case 949:case 1858:case 942:{e=37;break}case 1862:case 946:case 1857:case 941:{e=38;break}case 1868:case 955:case 1859:case 943:{e=39;break}default:{f=0;i=m;return f|0}}a:do if((e|0)==32){wb(f,(k|0)==31?4:c[193200+(k<<2)>>2]|0);switch(d|0){case 1859:case 1870:case 957:case 1868:case 955:case 1869:case 956:{e=39;break a}case 952:case 1874:case 961:case 1861:{d=0;e=34;break a}case 1871:case 958:case 1860:{d=0;e=36;break a}case 1867:case 951:case 1865:case 949:case 1866:case 950:case 1858:{e=37;break a}case 1864:case 948:case 1862:case 1863:case 947:case 1857:{e=38;break a}case 954:case 1876:case 963:case 953:case 1875:case 962:{d=1;e=34;break a}case 1873:case 960:case 1872:case 959:{d=1;e=36;break a}default:{f=0;i=m;return f|0}}}while(0);if((e|0)==34){wb(f,c[193200+(j<<2)>>2]|0);wb(f,c[193200+(l<<2)>>2]|0)}else if((e|0)==36){wb(f,c[193072+(j<<2)>>2]|0);wb(f,c[193072+(l<<2)>>2]|0)}else if((e|0)==37){wb(f,c[193328+(j<<2)>>2]|0);wb(f,c[193328+(l<<2)>>2]|0);d=0}else if((e|0)==38){wb(f,c[193456+(j<<2)>>2]|0);wb(f,c[193456+(l<<2)>>2]|0);d=0}else if((e|0)==39){wb(f,c[193584+(j<<2)>>2]|0);wb(f,c[193584+(l<<2)>>2]|0);d=0}wb(f,(k|0)==31?4:c[193200+(k<<2)>>2]|0);yb(f,g,((g|0)<0)<<31>>31);if(!(h&(j|0)==(l|0))){if(!((k|0)!=31&d)){f=b;i=m;return f|0}if(!((j|0)==(k|0)|(l|0)==(k|0))){f=b;i=m;return f|0}}f=1;i=m;return f|0}case 4:{wb(f,c[193712+((e&31)<<2)>>2]|0);e=e>>>5&31;wb(f,(e|0)==31?4:c[193200+(e<<2)>>2]|0);f=b;i=m;return f|0}case 5:{wb(f,c[193840+((e&31)<<2)>>2]|0);e=e>>>5&31;wb(f,(e|0)==31?4:c[193200+(e<<2)>>2]|0);f=b;i=m;return f|0}case 6:{wb(f,c[193456+((e&31)<<2)>>2]|0);e=e>>>5&31;wb(f,(e|0)==31?4:c[193200+(e<<2)>>2]|0);f=b;i=m;return f|0}case 7:{wb(f,c[193
function Me(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0,h=0,j=0,k=0,l=0,m=0,n=0,o=0,p=0,q=0,r=0,s=0,t=0,u=0,v=0,w=0,x=0,y=0,z=0,A=0,B=0;B=i;i=i+128|0;y=B+120|0;x=B+112|0;v=B+104|0;u=B+96|0;t=B+88|0;s=B+80|0;r=B+72|0;q=B+64|0;p=B+56|0;o=B+48|0;n=B+40|0;m=B+32|0;z=B+24|0;w=B+16|0;l=B+8|0;k=B;switch(ib(b)|0){case 1352:case 1351:case 1602:case 1601:{i=B;return}default:{}}a:do switch(ib(b)|0){case 69:{if((((((lb(b)|0)==3?nb(kb(b,0)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,1)|0)|0)|0):0)?(qb(kb(b,2)|0)|0)==21:0){e=1543304;A=145}else A=158;break}case 161:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543316;A=145}else A=158;break}case 162:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543324;A=145}else A=158;break}case 163:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543333;A=145}else A=158;break}case 164:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543341;A=145}else A=158;break}case 166:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==155:0){e=1543350;A=145}else A=158;break}case 167:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==155:0){e=1543358;A=145}else A=158;break}case 170:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==155:0){e=1543367;A=145}else A=158;break}case 171:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==155:0){e=1543375;A=145}else A=158;break}case 174:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543384;A=145}else A=158;break}case 175:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543392;A=145}else A=158;break}case 177:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543401;A=145}else A=158;break}case 178:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543409;A=145}else A=158;break}case 179:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543418;A=145}else A=158;break}case 180:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543426;A=145}else A=158;break}case 181:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543435;A=145}else A=158;break}case 182:{if((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==31:0){e=1543443;A=145}else A=158;break}case 282:{if(((((lb(b)|0)==2?ob(kb(b,0)|0)|0:0)?(A=sb(kb(b,0)|0)|0,(A|0)==0&(D|0)==0):0)?ob(kb(b,1)|0)|0:0)?(A=sb(kb(b,1)|0)|0,(A|0)==0&(D|0)==0):0){e=1556380;A=145;break a}if(((lb(b)|0)==2?ob(kb(b,1)|0)|0:0)?(A=sb(kb(b,1)|0)|0,(A|0)==0&(D|0)==0):0){e=1543452;A=145}else A=158;break}case 526:{if((((((lb(b)|0)==3?nb(kb(b,0)|0)|0:0)?(A=Fb(e,28)|0,Db(A,qb(kb(b,0)|0)|0)|0):0)?nb(kb(b,1)|0)|0:0)?(A=Fb(e,28)|0,Db(A,qb(kb(b,1)|0)|0)|0):0)?(qb(kb(b,2)|0)|0)==331:0){e=1543304;A=145}else A=158;break}case 543:{if((lb(b)|0)==1?(qb(kb(b,0)|0)|0)==21:0){e=1636321;A=145}else A=158;break}case 632:{if((lb(b)|0)==1?(qb(kb(b,0)|0)|0)==21:0){e=1557050;A=145}else A=158;break}case 868:{if((((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==21:0)?nb(kb(b,1)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,1)|0)|0)|0):0){e=1543461;A=145}else A=158;break}case 870:{if((((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==331:0)?nb(kb(b,1)|0)|0:0)?(A=Fb(e,28)|0,Db(A,qb(kb(b,1)|0)|0)|0):0){e=1543461;A=145}else A=158;break}case 874:{if((((lb(b)|0)==2?(qb(kb(b,0)|0)|0)==19:0)?nb(kb(b,1)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,1)|0)|0)|0):0){e=1543467;A=145}else A=158;break}case 1372:{if(((lb(b)|0)==1?ob(kb(b,0)|0)|0:0)?(A=sb(kb(b,0)|0)|0,(A|0)==0&(D|0)==0):0){e=1558331;A=145}else A=158;break}case 1373:{if(((lb(b)|0)==1?ob(kb(b,0)|0)|0:0)?(A=sb(kb(b,0)|0)|0,(A|0)==0&(D|0)==0):0){e=1558331;A=145}else A=158;break}case 1442:{if(((((lb(b)|0)==3?(qb(kb(b,0)|0)|0)==21:0)?(qb(kb(b,1)|0)|0)==21:0)?ob(kb(b,2)|0)|0:0)?(A=sb(kb(b,2)|0)|0,(A|0)==0&(D|0)==0):0){e=1681852;A=145}else A=158;break}case 1532:{if((((((lb(b)|0)==3?nb(kb(b,0)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,0)|0)|0)|0):0)?(qb(kb(b,1)|0)|0)==21:0)?nb(kb(b,2)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,2)|0)|0)|0):0){e=1543478;A=145}else A=158;break}case 1571:{if((((((lb(b)|0)==3?nb(kb(b,0)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,0)|0)|0)|0):0)?(qb(kb(b,1)|0)|0)==21:0)?nb(kb(b,2)|0)|0:0)?(A=Fb(e,8)|0,Db(A,qb(kb(b,2)|0)|0)|0):0){e=1543489;A=145}else A=158;break}case 1592:{if(((lb(b)|0)==1?ob(kb(b,0)|0)|0:0)?(A=sb(kb(b,0)|0)|0,(A|0)==0&(D|0)==0):0){e=1588917;A=145}else A=158;break}case 1594:{if(((lb(b)|0)==1?ob(kb(b,0)|0)|0:0)?(A=sb(kb(b,0)|0)|0,(A|0)==0&(D|0)==0):0){e=1641733;A=
function fi(a,b){a=a|0;b=b|0;if(!a)a=0;else a=ii(a,b,0)|0;return a|0}function gi(a,b){a=+a;b=b|0;return +(+hi(a,b))}function hi(a,b){a=+a;b=b|0;var d=0,e=0,f=0;h[l>>3]=a;d=c[l>>2]|0;e=c[l+4>>2]|0;f=Li(d|0,e|0,52)|0;switch(f&2047){case 0:{if(a!=0.0){a=+hi(a*18446744073709551616.0,b);d=(c[b>>2]|0)+-64|0}else d=0;c[b>>2]=d;break}case 2047:break;default:{c[b>>2]=(f&2047)+-1022;c[l>>2]=d;c[l+4>>2]=e&-2146435073|1071644672;a=+h[l>>3]}}return +a}function ii(b,d,e){b=b|0;d=d|0;e=e|0;do if(b){if(d>>>0<128){a[b>>0]=d;b=1;break}if(d>>>0<2048){a[b>>0]=d>>>6|192;a[b+1>>0]=d&63|128;b=2;break}if(d>>>0<55296|(d&-8192|0)==57344){a[b>>0]=d>>>12|224;a[b+1>>0]=d>>>6&63|128;a[b+2>>0]=d&63|128;b=3;break}if((d+-65536|0)>>>0<1048576){a[b>>0]=d>>>18|240;a[b+1>>0]=d>>>12&63|128;a[b+2>>0]=d>>>6&63|128;a[b+3>>0]=d&63|128;b=4;break}else{c[(Rh()|0)>>2]=84;b=-1;break}}else b=1;while(0);return b|0}function ji(b){b=b|0;var d=0,e=0;d=b+74|0;e=a[d>>0]|0;a[d>>0]=e+255|e;d=c[b>>2]|0;if(!(d&8)){c[b+8>>2]=0;c[b+4>>2]=0;e=c[b+44>>2]|0;c[b+28>>2]=e;c[b+20>>2]=e;c[b+16>>2]=e+(c[b+48>>2]|0);b=0}else{c[b>>2]=d|32;b=-1}return b|0}function ki(a,b,d){a=a|0;b=b|0;d=d|0;var e=0,f=0;e=a+20|0;f=c[e>>2]|0;a=(c[a+16>>2]|0)-f|0;a=a>>>0>d>>>0?d:a;Si(f|0,b|0,a|0)|0;c[e>>2]=(c[e>>2]|0)+a;return d|0}function li(a,b){a=a|0;b=b|0;mi(a,b)|0;return a|0}function mi(b,d){b=b|0;d=d|0;var e=0,f=0;e=d;a:do if(!((e^b)&3)){if(e&3)do{e=a[d>>0]|0;a[b>>0]=e;if(!(e<<24>>24))break a;d=d+1|0;b=b+1|0}while((d&3|0)!=0);e=c[d>>2]|0;if(!((e&-2139062144^-2139062144)&e+-16843009)){f=b;while(1){d=d+4|0;b=f+4|0;c[f>>2]=e;e=c[d>>2]|0;if((e&-2139062144^-2139062144)&e+-16843009|0)break;else f=b}}f=8}else f=8;while(0);if((f|0)==8){f=a[d>>0]|0;a[b>>0]=f;if(f<<24>>24)do{d=d+1|0;b=b+1|0;f=a[d>>0]|0;a[b>>0]=f}while(f<<24>>24!=0)}return b|0}function ni(b,c){b=b|0;c=c|0;b=oi(b,c)|0;return ((a[b>>0]|0)==(c&255)<<24>>24?b:0)|0}function oi(b,d){b=b|0;d=d|0;var e=0,f=0,g=0;f=d&255;a:do if(!f)b=b+(Xh(b)|0)|0;else{if(b&3){e=d&255;do{g=a[b>>0]|0;if(g<<24>>24==0?1:g<<24>>24==e<<24>>24)break a;b=b+1|0}while((b&3|0)!=0)}f=S(f,16843009)|0;e=c[b>>2]|0;b:do if(!((e&-2139062144^-2139062144)&e+-16843009))do{g=e^f;if((g&-2139062144^-2139062144)&g+-16843009|0)break b;b=b+4|0;e=c[b>>2]|0}while(!((e&-2139062144^-2139062144)&e+-16843009|0));while(0);e=d&255;while(1){g=a[b>>0]|0;if(g<<24>>24==0?1:g<<24>>24==e<<24>>24)break;else b=b+1|0}}while(0);return b|0}function pi(a,b,c){a=a|0;b=b|0;c=c|0;ri(a,b,c)|0;return a|0}function qi(a){a=a|0;return ((a|0)==32|(a+-9|0)>>>0<5)&1|0}function ri(b,d,e){b=b|0;d=d|0;e=e|0;var f=0,g=0,h=0;g=d;do if(!((g^b)&3)){f=(e|0)!=0;a:do if(f&(g&3|0)!=0)while(1){g=a[d>>0]|0;a[b>>0]=g;if(!(g<<24>>24))break a;e=e+-1|0;d=d+1|0;b=b+1|0;f=(e|0)!=0;if(!(f&(d&3|0)!=0)){h=5;break}}else h=5;while(0);if((h|0)==5)if(!f){e=0;break}if(a[d>>0]|0){b:do if(e>>>0>3){f=d;while(1){d=c[f>>2]|0;if((d&-2139062144^-2139062144)&d+-16843009|0){d=f;break b}c[b>>2]=d;e=e+-4|0;d=f+4|0;b=b+4|0;if(e>>>0>3)f=d;else break}}while(0);h=11}}else h=11;while(0);c:do if((h|0)==11)if(!e)e=0;else while(1){h=a[d>>0]|0;a[b>>0]=h;if(!(h<<24>>24))break c;e=e+-1|0;b=b+1|0;if(!e){e=0;break}else d=d+1|0}while(0);Ki(b|0,0,e|0)|0;return b|0}function si(b,c,e){b=b|0;c=c|0;e=e|0;var f=0,g=0;if(!e)f=0;else{f=a[b>>0]|0;a:do if(!(f<<24>>24))f=0;else while(1){e=e+-1|0;g=a[c>>0]|0;if(!(f<<24>>24==g<<24>>24&((e|0)!=0&g<<24>>24!=0)))break a;b=b+1|0;c=c+1|0;f=a[b>>0]|0;if(!(f<<24>>24)){f=0;break}}while(0);f=(f&255)-(d[c>>0]|0)|0}return f|0}function ti(b){b=b|0;var c=0,d=0,e=0,f=0,g=0,h=0;while(1){e=a[b>>0]|0;c=e<<24>>24;f=b+1|0;if(!(qi(c)|0))break;else b=f}switch(c|0){case 45:{b=1;g=5;break}case 43:{b=0;g=5;break}default:{h=0;d=b;b=e}}if((g|0)==5){h=b;d=f;b=a[f>>0]|0}c=(b<<24>>24)+-48|0;if(c>>>0<10){b=0;do{d=d+1|0;b=(b*10|0)-c|0;c=(a[d>>0]|0)+-48|0}while(c>>>0<10)}else b=0;return (h|0?b:0-b|0)|0}function ui(b,c,d){b=b|0;c=c|0;d=d|0;var e=0,f=0;a:do if(!d)b=0;else{while(1){e=a[b>>0]|0;f=a[c>>0]|0;if(e<<24>>24!=f<<24>>24)break;d=d+-1|0;if(!d){b=0;break a}else{b=b+1|0;c=c+1|0}}b=(e&255)-(f&255)|0}while(0);return b|0}function vi(a){a=a|0;var b=0,d=0;do if(a){if((c[a+76
// EMSCRIPTEN_END_FUNCS
var va=[cj,Oh,Ph,ki,Wd,Be,Ze,xf,pg,Vg,oh,Lh,Sh,cj,cj,cj];var wa=[dj,Bi,Xd,Ce,_e,yf,qg,Wg,ph,Mh,Th,dj,dj,dj,dj,dj];var xa=[ej,Ai,Nh,dd,cd,Vd,Ae,Ye,wf,og,Ug,nh,Kh,ej,ej,ej];var ya=[fj,fd,Pd,be,qe,Me,Se,ef,pf,Qf,$f,rg,Fg,Lg,$g,ih,Ch,Gh,fj,fj,fj,fj,fj,fj,fj,fj,fj,fj,fj,fj,fj,fj];var za=[gj,Wb,ad,_d,Ee,Le,$e,Af,Cg,Xg,qh,gj,gj,gj,gj,gj];var Aa=[hj,Yh,Bf,hj];var Ba=[ij,Ci,Di,Nd,Od,Qd,Rd,pe,re,se,Re,Te,Ue,of,qf,rf,Yf,Zf,_f,Kg,Mg,Ng,hh,jh,kh,Eh,Hh,Ih,ij,ij,ij,ij];var Ca=[jj,He,Ie,Je,Ke,jj,jj,jj];var Da=[kj,ed,oe,df,Eg,_g,Ah,kj];return{_cs_insn_name:Ya,_i64Subtract:Ii,_cs_op_count:bb,_cs_op_index:cb,_bitshift64Lshr:Li,_cs_errno:Na,_cs_reg_write:ab,_bitshift64Shl:Mi,_cs_malloc:Va,_fflush:vi,_bitshift64Ashr:Hi,_cs_insn_group:_a,_cs_strerror:Oa,_sbrk:Ri,_memcpy:Si,___uremdi3:Pi,_llvm_cttz_i32:Ni,_cs_disasm_ex:Ta,___udivmoddi4:Oi,_i64Add:Ji,_pthread_self:Ui,_cs_disasm_iter:Wa,_cs_disasm:Sa,_free:Bi,___udivdi3:Qi,_cs_option:Ra,___errno_location:Rh,_memset:Ki,_cs_reg_name:Xa,_cs_close:Qa,_cs_open:Pa,_cs_free:Ua,_cs_group_name:Za,_malloc:Ai,_cs_reg_read:$a,_memmove:Ti,_cs_support:Ma,_cs_version:La,runPostSets:Gi,stackAlloc:Ea,stackSave:Fa,stackRestore:Ga,establishStackSpace:Ha,setThrew:Ia,setTempRet0:Ja,getTempRet0:Ka,dynCall_iiii:Vi,dynCall_vi:Wi,dynCall_ii:Xi,dynCall_viii:Yi,dynCall_iiiiiiiii:Zi,dynCall_iiiii:_i,dynCall_iii:$i,dynCall_iiiiii:aj,dynCall_viiii:bj}})
// EMSCRIPTEN_END_ASM
(Module.asmGlobalArg,Module.asmLibraryArg,buffer);var _cs_insn_name=Module["_cs_insn_name"]=asm["_cs_insn_name"];var _cs_disasm_ex=Module["_cs_disasm_ex"]=asm["_cs_disasm_ex"];var _cs_op_count=Module["_cs_op_count"]=asm["_cs_op_count"];var _cs_op_index=Module["_cs_op_index"]=asm["_cs_op_index"];var _bitshift64Lshr=Module["_bitshift64Lshr"]=asm["_bitshift64Lshr"];var _cs_errno=Module["_cs_errno"]=asm["_cs_errno"];var _cs_group_name=Module["_cs_group_name"]=asm["_cs_group_name"];var _bitshift64Shl=Module["_bitshift64Shl"]=asm["_bitshift64Shl"];var _cs_malloc=Module["_cs_malloc"]=asm["_cs_malloc"];var _fflush=Module["_fflush"]=asm["_fflush"];var _bitshift64Ashr=Module["_bitshift64Ashr"]=asm["_bitshift64Ashr"];var _cs_insn_group=Module["_cs_insn_group"]=asm["_cs_insn_group"];var _llvm_cttz_i32=Module["_llvm_cttz_i32"]=asm["_llvm_cttz_i32"];var _cs_option=Module["_cs_option"]=asm["_cs_option"];var _sbrk=Module["_sbrk"]=asm["_sbrk"];var _memcpy=Module["_memcpy"]=asm["_memcpy"];var ___uremdi3=Module["___uremdi3"]=asm["___uremdi3"];var _i64Subtract=Module["_i64Subtract"]=asm["_i64Subtract"];var ___udivmoddi4=Module["___udivmoddi4"]=asm["___udivmoddi4"];var _i64Add=Module["_i64Add"]=asm["_i64Add"];var _pthread_self=Module["_pthread_self"]=asm["_pthread_self"];var _cs_disasm_iter=Module["_cs_disasm_iter"]=asm["_cs_disasm_iter"];var _cs_disasm=Module["_cs_disasm"]=asm["_cs_disasm"];var _cs_reg_name=Module["_cs_reg_name"]=asm["_cs_reg_name"];var ___udivdi3=Module["___udivdi3"]=asm["___udivdi3"];var _cs_strerror=Module["_cs_strerror"]=asm["_cs_strerror"];var ___errno_location=Module["___errno_location"]=asm["___errno_location"];var _memset=Module["_memset"]=asm["_memset"];var _free=Module["_free"]=asm["_free"];var runPostSets=Module["runPostSets"]=asm["runPostSets"];var _cs_close=Module["_cs_close"]=asm["_cs_close"];var _cs_open=Module["_cs_open"]=asm["_cs_open"];var _cs_free=Module["_cs_free"]=asm["_cs_free"];var _cs_reg_write=Module["_cs_reg_write"]=asm["_cs_reg_write"];var _malloc=Module["_malloc"]=asm["_malloc"];var _cs_reg_read=Module["_cs_reg_read"]=asm["_cs_reg_read"];var _memmove=Module["_memmove"]=asm["_memmove"];var _cs_support=Module["_cs_support"]=asm["_cs_support"];var _cs_version=Module["_cs_version"]=asm["_cs_version"];var dynCall_iiii=Module["dynCall_iiii"]=asm["dynCall_iiii"];var dynCall_vi=Module["dynCall_vi"]=asm["dynCall_vi"];var dynCall_ii=Module["dynCall_ii"]=asm["dynCall_ii"];var dynCall_viii=Module["dynCall_viii"]=asm["dynCall_viii"];var dynCall_iiiiiiiii=Module["dynCall_iiiiiiiii"]=asm["dynCall_iiiiiiiii"];var dynCall_iiiii=Module["dynCall_iiiii"]=asm["dynCall_iiiii"];var dynCall_iii=Module["dynCall_iii"]=asm["dynCall_iii"];var dynCall_iiiiii=Module["dynCall_iiiiii"]=asm["dynCall_iiiiii"];var dynCall_viiii=Module["dynCall_viiii"]=asm["dynCall_viiii"];Runtime.stackAlloc=asm["stackAlloc"];Runtime.stackSave=asm["stackSave"];Runtime.stackRestore=asm["stackRestore"];Runtime.establishStackSpace=asm["establishStackSpace"];Runtime.setTempRet0=asm["setTempRet0"];Runtime.getTempRet0=asm["getTempRet0"];function ExitStatus(status){this.name="ExitStatus";this.message="Program terminated with exit("+status+")";this.status=status}ExitStatus.prototype=new Error;ExitStatus.prototype.constructor=ExitStatus;var initialStackTop;var preloadStartTime=null;var calledMain=false;dependenciesFulfilled=function runCaller(){if(!Module["calledRun"])run();if(!Module["calledRun"])dependenciesFulfilled=runCaller};Module["callMain"]=Module.callMain=function callMain(args){args=args||[];ensureInitRuntime();var argc=args.length+1;function pad(){for(var i=0;i<4-1;i++){argv.push(0)}}var argv=[allocate(intArrayFromString(Module["thisProgram"]),"i8",ALLOC_NORMAL)];pad();for(var i=0;i<argc-1;i=i+1){argv.push(allocate(intArrayFromString(args[i]),"i8",ALLOC_NORMAL));pad()}argv.push(0);argv=allocate(argv,"i32",ALLOC_NORMAL);try{var ret=Module["_main"](argc,argv,0);exit(ret,true)}catch(e){if(e instanceof ExitStatus){return}else if(e=="SimulateInfiniteLoop"){Module["noExitRuntime"]=true;return}else{if(e&&typeof e==="object"&&e.stack)Module.printErr("ex
return MCapstone;
};
/**
* (c) 2014-2017 Capstone.JS
* Wrapper made by Alexandro Sanchez Bach.
*/
// Emscripten demodularize
var MCapstone = new MCapstone();
var cs = {
// Return codes
ERR_OK: 0, // No error: everything was fine
ERR_MEM: 1, // Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
ERR_ARCH: 2, // Unsupported architecture: cs_open()
ERR_HANDLE: 3, // Invalid handle: cs_op_count(), cs_op_index()
ERR_CSH: 4, // Invalid csh argument: cs_close(), cs_errno(), cs_option()
ERR_MODE: 5, // Invalid/unsupported mode: cs_open()
ERR_OPTION: 6, // Invalid/unsupported option: cs_option()
ERR_DETAIL: 7, // Information is unavailable because detail option is OFF
ERR_MEMSETUP: 8, // Dynamic memory management uninitialized (see OPT_MEM)
ERR_VERSION: 9, // Unsupported version (bindings)
ERR_DIET: 10, // Access irrelevant data in "diet" engine
ERR_SKIPDATA: 11, // Access irrelevant data for "data" instruction in SKIPDATA mode
ERR_X86_ATT: 12, // X86 AT&T syntax is unsupported (opt-out at compile time)
ERR_X86_INTEL: 13, // X86 Intel syntax is unsupported (opt-out at compile time)
// Architectures
ARCH_ARM: 0, // ARM architecture (including Thumb, Thumb-2)
ARCH_ARM64: 1, // ARM-64, also called AArch64
ARCH_MIPS: 2, // Mips architecture
ARCH_X86: 3, // X86 architecture (including x86 & x86-64)
ARCH_PPC: 4, // PowerPC architecture
ARCH_SPARC: 5, // Sparc architecture
ARCH_SYSZ: 6, // SystemZ architecture
ARCH_XCORE: 7, // XCore architecture
ARCH_MAX: 8,
ARCH_ALL: 0xFFFF,
// Modes
MODE_LITTLE_ENDIAN: 0, // Little-Endian mode (default mode)
MODE_ARM: 0, // 32-bit ARM
MODE_16: 1 << 1, // 16-bit mode (X86)
MODE_32: 1 << 2, // 32-bit mode (X86)
MODE_64: 1 << 3, // 64-bit mode (X86, PPC)
MODE_THUMB: 1 << 4, // ARM's Thumb mode, including Thumb-2
MODE_MCLASS: 1 << 5, // ARM's Cortex-M series
MODE_V8: 1 << 6, // ARMv8 A32 encodings for ARM
MODE_MICRO: 1 << 4, // MicroMips mode (MIPS)
MODE_MIPS3: 1 << 5, // Mips III ISA
MODE_MIPS32R6: 1 << 6, // Mips32r6 ISA
MODE_MIPSGP64: 1 << 7, // General Purpose Registers are 64-bit wide (MIPS)
MODE_V9: 1 << 4, // SparcV9 mode (Sparc)
MODE_BIG_ENDIAN: 1 << 31, // Big-Endian mode
MODE_MIPS32: 1 << 2, // Mips32 ISA (Mips)
MODE_MIPS64: 1 << 3, // Mips64 ISA (Mips)
// Options
OPT_SYNTAX: 1, // Intel X86 asm syntax (CS_ARCH_X86 arch)
OPT_DETAIL: 2, // Break down instruction structure into details
OPT_MODE: 3, // Change engine's mode at run-time
OPT_MEM: 4, // Change engine's mode at run-time
OPT_SKIPDATA: 5, // Skip data when disassembling
OPT_SKIPDATA_SETUP: 6, // Setup user-defined function for SKIPDATA option
// Capstone option value
OPT_OFF: 0, // Turn OFF an option - default option of CS_OPT_DETAIL
OPT_ON: 3, // Turn ON an option (CS_OPT_DETAIL)
// Capstone syntax value
OPT_SYNTAX_DEFAULT: 0, // Default assembly syntax of all platforms (CS_OPT_SYNTAX)
OPT_SYNTAX_INTEL: 1, // Intel X86 asm syntax - default syntax on X86 (CS_OPT_SYNTAX, CS_ARCH_X86)
OPT_SYNTAX_ATT: 2, // ATT asm syntax (CS_OPT_SYNTAX, CS_ARCH_X86)
OPT_SYNTAX_NOREGNAME: 3, // Asm syntax prints register name with only number - (CS_OPT_SYNTAX, CS_ARCH_PPC, CS_ARCH_ARM)
// Common instruction groups - to be consistent across all architectures.
GRP_INVALID: 0, // uninitialized/invalid group.
GRP_JUMP: 1, // all jump instructions (conditional+direct+indirect jumps)
GRP_CALL: 2, // all call instructions
GRP_RET: 3, // all return instructions
GRP_INT: 4, // all interrupt instructions (int+syscall)
GRP_IRET: 5, // all interrupt return instructions
// Common instruction operand types - to be consistent across all architectures.
OP_INVALID: 0,
OP_REG: 1,
OP_IMM: 2,
OP_MEM: 3,
OP_FP: 4,
// query id for cs_support()
SUPPORT_DIET: 0xFFFF + 1,
SUPPORT_X86_REDUCE: 0xFFFF + 2,
version: function() {
major_ptr = MCapstone._malloc(4);
minor_ptr = MCapstone._malloc(4);
var ret = MCapstone.ccall('cs_version', 'number',
['pointer', 'pointer'], [major_ptr, minor_ptr]);
major = MCapstone.getValue(major_ptr, 'i32');
minor = MCapstone.getValue(minor_ptr, 'i32');
MCapstone._free(major_ptr);
MCapstone._free(minor_ptr);
return ret;
},
support: function(query) {
var ret = MCapstone.ccall('cs_support', 'number', ['number'], [query]);
return ret;
},
strerror: function(code) {
var ret = MCapstone.ccall('cs_strerror', 'string', ['number'], [code]);
return ret;
},
/**
* Instruction object
*/
Instruction: function (pointer) {
// Instruction ID
this.id = MCapstone.getValue(pointer, 'i32');
// Address (EIP) of this instruction
this.address = MCapstone.getValue(pointer + 8, 'i64');
// Size of this instruction
this.size = MCapstone.getValue(pointer + 16, 'i16');
// Machine bytes of this instruction (length indicated by @size above)
this.bytes = [];
for (var i = 0; i < this.size; i++) {
var byteValue = MCapstone.getValue(pointer + 18 + i, 'i8');
if (byteValue < 0) {
byteValue = 256 + byteValue;
}
this.bytes.push(byteValue);
}
// ASCII representation of instruction mnemonic
this.mnemonic = MCapstone.Pointer_stringify(pointer + 34);
// ASCII representation of instruction operands
this.op_str = MCapstone.Pointer_stringify(pointer + 66);
},
/**
* Capstone object
*/
Capstone: function (arch, mode) {
this.arch = arch;
this.mode = mode;
this.handle_ptr = MCapstone._malloc(4);
// Options
this.option = function(option, value) {
var handle = MCapstone.getValue(this.handle_ptr, '*');
if (!handle) {
return;
}
var ret = MCapstone.ccall('cs_option', 'number',
['pointer', 'number', 'number'],
[handle, option, value]
);
if (ret != cs.ERR_OK) {
var error = 'Capstone.js: Function cs_option failed with code ' + ret + ':\n' + cs.strerror(ret);
throw error;
}
}
// Disassemble
this.disasm = function (buffer, addr, max) {
var handle = MCapstone.getValue(this.handle_ptr, 'i32');
// Allocate buffer and copy data
var buffer_len = buffer.length;
var buffer_ptr = MCapstone._malloc(buffer_len);
MCapstone.writeArrayToMemory(buffer, buffer_ptr);
// Pointer to the instruction array
var insn_ptr_ptr = MCapstone._malloc(4);
var count = MCapstone.ccall('cs_disasm', 'number',
['number', 'pointer', 'number', 'number', 'number', 'pointer'],
[handle, buffer_ptr, buffer_len, addr, 0, max || 0, insn_ptr_ptr]
);
if (count == 0 && buffer_len != 0) {
MCapstone._free(insn_ptr_ptr);
MCapstone._free(buffer_ptr);
var code = this.errno();
var error = 'Capstone.js: Function cs_disasm failed with code ' + code + ':\n' + cs.strerror(code);
throw error;
}
// Dereference intruction array
var insn_ptr = MCapstone.getValue(insn_ptr_ptr, 'i32');
var insn_size = 232;
var instructions = [];
// Save instructions
for (var i = 0; i < count; i++) {
instructions.push(new cs.Instruction(insn_ptr + i * insn_size));
}
var count = MCapstone.ccall('cs_free', 'void',
['pointer', 'number'],
[insn_ptr, count]
);
MCapstone._free(insn_ptr_ptr);
MCapstone._free(buffer_ptr);
return instructions;
};
this.reg_name = function(reg_id) {
var handle = MCapstone.getValue(this.handle_ptr, '*');
var ret = MCapstone.ccall('cs_reg_name', 'string', ['pointer', 'number'], [handle, reg_id]);
return ret;
}
this.insn_name = function(insn_id) {
var handle = MCapstone.getValue(this.handle_ptr, '*');
var ret = MCapstone.ccall('cs_insn_name', 'string', ['pointer', 'number'], [handle, insn_id]);
return ret;
}
this.group_name = function(group_id) {
var handle = MCapstone.getValue(this.handle_ptr, '*');
var ret = MCapstone.ccall('cs_group_name', 'string', ['pointer', 'number'], [handle, group_id]);
return ret;
}
this.errno = function() {
var handle = MCapstone.getValue(this.handle_ptr, '*');
var ret = MCapstone.ccall('cs_errno', 'number', ['pointer'], [handle]);
return ret;
}
this.close = function() {
var handle = MCapstone.getValue(this.handle_ptr, '*');
var ret = MCapstone.ccall('cs_close', 'number', ['pointer'], [handle]);
if (ret != cs.ERR_OK) {
var error = 'Capstone.js: Function cs_close failed with code ' + ret + ':\n' + cs.strerror(ret);
throw error;
}
MCapstone._free(this.handle_ptr);
}
// Constructor
var ret = MCapstone.ccall('cs_open', 'number',
['number', 'number', 'pointer'],
[this.arch, this.mode, this.handle_ptr]
);
if (ret != cs.ERR_OK) {
MCapstone.setValue(this.handle_ptr, 0, '*');
var error = 'Capstone.js: Function cs_open failed with code ' + ret + ':\n' + cs.strerror(ret);
throw error;
}
},
};
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm64_const.py]
// ARM64 shift type
cs.ARM64_SFT_INVALID = 0
cs.ARM64_SFT_LSL = 1
cs.ARM64_SFT_MSL = 2
cs.ARM64_SFT_LSR = 3
cs.ARM64_SFT_ASR = 4
cs.ARM64_SFT_ROR = 5
// ARM64 extender type
cs.ARM64_EXT_INVALID = 0
cs.ARM64_EXT_UXTB = 1
cs.ARM64_EXT_UXTH = 2
cs.ARM64_EXT_UXTW = 3
cs.ARM64_EXT_UXTX = 4
cs.ARM64_EXT_SXTB = 5
cs.ARM64_EXT_SXTH = 6
cs.ARM64_EXT_SXTW = 7
cs.ARM64_EXT_SXTX = 8
// ARM64 condition code
cs.ARM64_CC_INVALID = 0
cs.ARM64_CC_EQ = 1
cs.ARM64_CC_NE = 2
cs.ARM64_CC_HS = 3
cs.ARM64_CC_LO = 4
cs.ARM64_CC_MI = 5
cs.ARM64_CC_PL = 6
cs.ARM64_CC_VS = 7
cs.ARM64_CC_VC = 8
cs.ARM64_CC_HI = 9
cs.ARM64_CC_LS = 10
cs.ARM64_CC_GE = 11
cs.ARM64_CC_LT = 12
cs.ARM64_CC_GT = 13
cs.ARM64_CC_LE = 14
cs.ARM64_CC_AL = 15
cs.ARM64_CC_NV = 16
// System registers
// System registers for MRS
cs.ARM64_SYSREG_INVALID = 0
cs.ARM64_SYSREG_MDCCSR_EL0 = 0x9808
cs.ARM64_SYSREG_DBGDTRRX_EL0 = 0x9828
cs.ARM64_SYSREG_MDRAR_EL1 = 0x8080
cs.ARM64_SYSREG_OSLSR_EL1 = 0x808c
cs.ARM64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83f6
cs.ARM64_SYSREG_PMCEID0_EL0 = 0xdce6
cs.ARM64_SYSREG_PMCEID1_EL0 = 0xdce7
cs.ARM64_SYSREG_MIDR_EL1 = 0xc000
cs.ARM64_SYSREG_CCSIDR_EL1 = 0xc800
cs.ARM64_SYSREG_CLIDR_EL1 = 0xc801
cs.ARM64_SYSREG_CTR_EL0 = 0xd801
cs.ARM64_SYSREG_MPIDR_EL1 = 0xc005
cs.ARM64_SYSREG_REVIDR_EL1 = 0xc006
cs.ARM64_SYSREG_AIDR_EL1 = 0xc807
cs.ARM64_SYSREG_DCZID_EL0 = 0xd807
cs.ARM64_SYSREG_ID_PFR0_EL1 = 0xc008
cs.ARM64_SYSREG_ID_PFR1_EL1 = 0xc009
cs.ARM64_SYSREG_ID_DFR0_EL1 = 0xc00a
cs.ARM64_SYSREG_ID_AFR0_EL1 = 0xc00b
cs.ARM64_SYSREG_ID_MMFR0_EL1 = 0xc00c
cs.ARM64_SYSREG_ID_MMFR1_EL1 = 0xc00d
cs.ARM64_SYSREG_ID_MMFR2_EL1 = 0xc00e
cs.ARM64_SYSREG_ID_MMFR3_EL1 = 0xc00f
cs.ARM64_SYSREG_ID_ISAR0_EL1 = 0xc010
cs.ARM64_SYSREG_ID_ISAR1_EL1 = 0xc011
cs.ARM64_SYSREG_ID_ISAR2_EL1 = 0xc012
cs.ARM64_SYSREG_ID_ISAR3_EL1 = 0xc013
cs.ARM64_SYSREG_ID_ISAR4_EL1 = 0xc014
cs.ARM64_SYSREG_ID_ISAR5_EL1 = 0xc015
cs.ARM64_SYSREG_ID_A64PFR0_EL1 = 0xc020
cs.ARM64_SYSREG_ID_A64PFR1_EL1 = 0xc021
cs.ARM64_SYSREG_ID_A64DFR0_EL1 = 0xc028
cs.ARM64_SYSREG_ID_A64DFR1_EL1 = 0xc029
cs.ARM64_SYSREG_ID_A64AFR0_EL1 = 0xc02c
cs.ARM64_SYSREG_ID_A64AFR1_EL1 = 0xc02d
cs.ARM64_SYSREG_ID_A64ISAR0_EL1 = 0xc030
cs.ARM64_SYSREG_ID_A64ISAR1_EL1 = 0xc031
cs.ARM64_SYSREG_ID_A64MMFR0_EL1 = 0xc038
cs.ARM64_SYSREG_ID_A64MMFR1_EL1 = 0xc039
cs.ARM64_SYSREG_MVFR0_EL1 = 0xc018
cs.ARM64_SYSREG_MVFR1_EL1 = 0xc019
cs.ARM64_SYSREG_MVFR2_EL1 = 0xc01a
cs.ARM64_SYSREG_RVBAR_EL1 = 0xc601
cs.ARM64_SYSREG_RVBAR_EL2 = 0xe601
cs.ARM64_SYSREG_RVBAR_EL3 = 0xf601
cs.ARM64_SYSREG_ISR_EL1 = 0xc608
cs.ARM64_SYSREG_CNTPCT_EL0 = 0xdf01
cs.ARM64_SYSREG_CNTVCT_EL0 = 0xdf02
cs.ARM64_SYSREG_TRCSTATR = 0x8818
cs.ARM64_SYSREG_TRCIDR8 = 0x8806
cs.ARM64_SYSREG_TRCIDR9 = 0x880e
cs.ARM64_SYSREG_TRCIDR10 = 0x8816
cs.ARM64_SYSREG_TRCIDR11 = 0x881e
cs.ARM64_SYSREG_TRCIDR12 = 0x8826
cs.ARM64_SYSREG_TRCIDR13 = 0x882e
cs.ARM64_SYSREG_TRCIDR0 = 0x8847
cs.ARM64_SYSREG_TRCIDR1 = 0x884f
cs.ARM64_SYSREG_TRCIDR2 = 0x8857
cs.ARM64_SYSREG_TRCIDR3 = 0x885f
cs.ARM64_SYSREG_TRCIDR4 = 0x8867
cs.ARM64_SYSREG_TRCIDR5 = 0x886f
cs.ARM64_SYSREG_TRCIDR6 = 0x8877
cs.ARM64_SYSREG_TRCIDR7 = 0x887f
cs.ARM64_SYSREG_TRCOSLSR = 0x888c
cs.ARM64_SYSREG_TRCPDSR = 0x88ac
cs.ARM64_SYSREG_TRCDEVAFF0 = 0x8bd6
cs.ARM64_SYSREG_TRCDEVAFF1 = 0x8bde
cs.ARM64_SYSREG_TRCLSR = 0x8bee
cs.ARM64_SYSREG_TRCAUTHSTATUS = 0x8bf6
cs.ARM64_SYSREG_TRCDEVARCH = 0x8bfe
cs.ARM64_SYSREG_TRCDEVID = 0x8b97
cs.ARM64_SYSREG_TRCDEVTYPE = 0x8b9f
cs.ARM64_SYSREG_TRCPIDR4 = 0x8ba7
cs.ARM64_SYSREG_TRCPIDR5 = 0x8baf
cs.ARM64_SYSREG_TRCPIDR6 = 0x8bb7
cs.ARM64_SYSREG_TRCPIDR7 = 0x8bbf
cs.ARM64_SYSREG_TRCPIDR0 = 0x8bc7
cs.ARM64_SYSREG_TRCPIDR1 = 0x8bcf
cs.ARM64_SYSREG_TRCPIDR2 = 0x8bd7
cs.ARM64_SYSREG_TRCPIDR3 = 0x8bdf
cs.ARM64_SYSREG_TRCCIDR0 = 0x8be7
cs.ARM64_SYSREG_TRCCIDR1 = 0x8bef
cs.ARM64_SYSREG_TRCCIDR2 = 0x8bf7
cs.ARM64_SYSREG_TRCCIDR3 = 0x8bff
cs.ARM64_SYSREG_ICC_IAR1_EL1 = 0xc660
cs.ARM64_SYSREG_ICC_IAR0_EL1 = 0xc640
cs.ARM64_SYSREG_ICC_HPPIR1_EL1 = 0xc662
cs.ARM64_SYSREG_ICC_HPPIR0_EL1 = 0xc642
cs.ARM64_SYSREG_ICC_RPR_EL1 = 0xc65b
cs.ARM64_SYSREG_ICH_VTR_EL2 = 0xe659
cs.ARM64_SYSREG_ICH_EISR_EL2 = 0xe65b
cs.ARM64_SYSREG_ICH_ELSR_EL2 = 0xe65d
// System registers for MSR
cs.ARM64_SYSREG_DBGDTRTX_EL0 = 0x9828
cs.ARM64_SYSREG_OSLAR_EL1 = 0x8084
cs.ARM64_SYSREG_PMSWINC_EL0 = 0xdce4
cs.ARM64_SYSREG_TRCOSLAR = 0x8884
cs.ARM64_SYSREG_TRCLAR = 0x8be6
cs.ARM64_SYSREG_ICC_EOIR1_EL1 = 0xc661
cs.ARM64_SYSREG_ICC_EOIR0_EL1 = 0xc641
cs.ARM64_SYSREG_ICC_DIR_EL1 = 0xc659
cs.ARM64_SYSREG_ICC_SGI1R_EL1 = 0xc65d
cs.ARM64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e
cs.ARM64_SYSREG_ICC_SGI0R_EL1 = 0xc65f
// System PState Field (MSR instruction)
cs.ARM64_PSTATE_INVALID = 0
cs.ARM64_PSTATE_SPSEL = 0x05
cs.ARM64_PSTATE_DAIFSET = 0x1e
cs.ARM64_PSTATE_DAIFCLR = 0x1f
// Vector arrangement specifier (for FloatingPoint/Advanced SIMD insn)
cs.ARM64_VAS_INVALID = 0
cs.ARM64_VAS_8B = 1
cs.ARM64_VAS_16B = 2
cs.ARM64_VAS_4H = 3
cs.ARM64_VAS_8H = 4
cs.ARM64_VAS_2S = 5
cs.ARM64_VAS_4S = 6
cs.ARM64_VAS_1D = 7
cs.ARM64_VAS_2D = 8
cs.ARM64_VAS_1Q = 9
// Vector element size specifier
cs.ARM64_VESS_INVALID = 0
cs.ARM64_VESS_B = 1
cs.ARM64_VESS_H = 2
cs.ARM64_VESS_S = 3
cs.ARM64_VESS_D = 4
// Memory barrier operands
cs.ARM64_BARRIER_INVALID = 0
cs.ARM64_BARRIER_OSHLD = 0x1
cs.ARM64_BARRIER_OSHST = 0x2
cs.ARM64_BARRIER_OSH = 0x3
cs.ARM64_BARRIER_NSHLD = 0x5
cs.ARM64_BARRIER_NSHST = 0x6
cs.ARM64_BARRIER_NSH = 0x7
cs.ARM64_BARRIER_ISHLD = 0x9
cs.ARM64_BARRIER_ISHST = 0xa
cs.ARM64_BARRIER_ISH = 0xb
cs.ARM64_BARRIER_LD = 0xd
cs.ARM64_BARRIER_ST = 0xe
cs.ARM64_BARRIER_SY = 0xf
// Operand type for instruction's operands
cs.ARM64_OP_INVALID = 0
cs.ARM64_OP_REG = 1
cs.ARM64_OP_IMM = 2
cs.ARM64_OP_MEM = 3
cs.ARM64_OP_FP = 4
cs.ARM64_OP_CIMM = 64
cs.ARM64_OP_REG_MRS = 65
cs.ARM64_OP_REG_MSR = 66
cs.ARM64_OP_PSTATE = 67
cs.ARM64_OP_SYS = 68
cs.ARM64_OP_PREFETCH = 69
cs.ARM64_OP_BARRIER = 70
// TLBI operations
cs.ARM64_TLBI_INVALID = 0
cs.ARM64_TLBI_VMALLE1IS = 1
cs.ARM64_TLBI_VAE1IS = 2
cs.ARM64_TLBI_ASIDE1IS = 3
cs.ARM64_TLBI_VAAE1IS = 4
cs.ARM64_TLBI_VALE1IS = 5
cs.ARM64_TLBI_VAALE1IS = 6
cs.ARM64_TLBI_ALLE2IS = 7
cs.ARM64_TLBI_VAE2IS = 8
cs.ARM64_TLBI_ALLE1IS = 9
cs.ARM64_TLBI_VALE2IS = 10
cs.ARM64_TLBI_VMALLS12E1IS = 11
cs.ARM64_TLBI_ALLE3IS = 12
cs.ARM64_TLBI_VAE3IS = 13
cs.ARM64_TLBI_VALE3IS = 14
cs.ARM64_TLBI_IPAS2E1IS = 15
cs.ARM64_TLBI_IPAS2LE1IS = 16
cs.ARM64_TLBI_IPAS2E1 = 17
cs.ARM64_TLBI_IPAS2LE1 = 18
cs.ARM64_TLBI_VMALLE1 = 19
cs.ARM64_TLBI_VAE1 = 20
cs.ARM64_TLBI_ASIDE1 = 21
cs.ARM64_TLBI_VAAE1 = 22
cs.ARM64_TLBI_VALE1 = 23
cs.ARM64_TLBI_VAALE1 = 24
cs.ARM64_TLBI_ALLE2 = 25
cs.ARM64_TLBI_VAE2 = 26
cs.ARM64_TLBI_ALLE1 = 27
cs.ARM64_TLBI_VALE2 = 28
cs.ARM64_TLBI_VMALLS12E1 = 29
cs.ARM64_TLBI_ALLE3 = 30
cs.ARM64_TLBI_VAE3 = 31
cs.ARM64_TLBI_VALE3 = 32
// AT operations
cs.ARM64_AT_S1E1R = 33
cs.ARM64_AT_S1E1W = 34
cs.ARM64_AT_S1E0R = 35
cs.ARM64_AT_S1E0W = 36
cs.ARM64_AT_S1E2R = 37
cs.ARM64_AT_S1E2W = 38
cs.ARM64_AT_S12E1R = 39
cs.ARM64_AT_S12E1W = 40
cs.ARM64_AT_S12E0R = 41
cs.ARM64_AT_S12E0W = 42
cs.ARM64_AT_S1E3R = 43
cs.ARM64_AT_S1E3W = 44
// DC operations
cs.ARM64_DC_INVALID = 0
cs.ARM64_DC_ZVA = 1
cs.ARM64_DC_IVAC = 2
cs.ARM64_DC_ISW = 3
cs.ARM64_DC_CVAC = 4
cs.ARM64_DC_CSW = 5
cs.ARM64_DC_CVAU = 6
cs.ARM64_DC_CIVAC = 7
cs.ARM64_DC_CISW = 8
// IC operations
cs.ARM64_IC_INVALID = 0
cs.ARM64_IC_IALLUIS = 1
cs.ARM64_IC_IALLU = 2
cs.ARM64_IC_IVAU = 3
// Prefetch operations (PRFM)
cs.ARM64_PRFM_INVALID = 0
cs.ARM64_PRFM_PLDL1KEEP = 0x00+1
cs.ARM64_PRFM_PLDL1STRM = 0x01+1
cs.ARM64_PRFM_PLDL2KEEP = 0x02+1
cs.ARM64_PRFM_PLDL2STRM = 0x03+1
cs.ARM64_PRFM_PLDL3KEEP = 0x04+1
cs.ARM64_PRFM_PLDL3STRM = 0x05+1
cs.ARM64_PRFM_PLIL1KEEP = 0x08+1
cs.ARM64_PRFM_PLIL1STRM = 0x09+1
cs.ARM64_PRFM_PLIL2KEEP = 0x0a+1
cs.ARM64_PRFM_PLIL2STRM = 0x0b+1
cs.ARM64_PRFM_PLIL3KEEP = 0x0c+1
cs.ARM64_PRFM_PLIL3STRM = 0x0d+1
cs.ARM64_PRFM_PSTL1KEEP = 0x10+1
cs.ARM64_PRFM_PSTL1STRM = 0x11+1
cs.ARM64_PRFM_PSTL2KEEP = 0x12+1
cs.ARM64_PRFM_PSTL2STRM = 0x13+1
cs.ARM64_PRFM_PSTL3KEEP = 0x14+1
cs.ARM64_PRFM_PSTL3STRM = 0x15+1
// ARM64 registers
cs.ARM64_REG_INVALID = 0
cs.ARM64_REG_X29 = 1
cs.ARM64_REG_X30 = 2
cs.ARM64_REG_NZCV = 3
cs.ARM64_REG_SP = 4
cs.ARM64_REG_WSP = 5
cs.ARM64_REG_WZR = 6
cs.ARM64_REG_XZR = 7
cs.ARM64_REG_B0 = 8
cs.ARM64_REG_B1 = 9
cs.ARM64_REG_B2 = 10
cs.ARM64_REG_B3 = 11
cs.ARM64_REG_B4 = 12
cs.ARM64_REG_B5 = 13
cs.ARM64_REG_B6 = 14
cs.ARM64_REG_B7 = 15
cs.ARM64_REG_B8 = 16
cs.ARM64_REG_B9 = 17
cs.ARM64_REG_B10 = 18
cs.ARM64_REG_B11 = 19
cs.ARM64_REG_B12 = 20
cs.ARM64_REG_B13 = 21
cs.ARM64_REG_B14 = 22
cs.ARM64_REG_B15 = 23
cs.ARM64_REG_B16 = 24
cs.ARM64_REG_B17 = 25
cs.ARM64_REG_B18 = 26
cs.ARM64_REG_B19 = 27
cs.ARM64_REG_B20 = 28
cs.ARM64_REG_B21 = 29
cs.ARM64_REG_B22 = 30
cs.ARM64_REG_B23 = 31
cs.ARM64_REG_B24 = 32
cs.ARM64_REG_B25 = 33
cs.ARM64_REG_B26 = 34
cs.ARM64_REG_B27 = 35
cs.ARM64_REG_B28 = 36
cs.ARM64_REG_B29 = 37
cs.ARM64_REG_B30 = 38
cs.ARM64_REG_B31 = 39
cs.ARM64_REG_D0 = 40
cs.ARM64_REG_D1 = 41
cs.ARM64_REG_D2 = 42
cs.ARM64_REG_D3 = 43
cs.ARM64_REG_D4 = 44
cs.ARM64_REG_D5 = 45
cs.ARM64_REG_D6 = 46
cs.ARM64_REG_D7 = 47
cs.ARM64_REG_D8 = 48
cs.ARM64_REG_D9 = 49
cs.ARM64_REG_D10 = 50
cs.ARM64_REG_D11 = 51
cs.ARM64_REG_D12 = 52
cs.ARM64_REG_D13 = 53
cs.ARM64_REG_D14 = 54
cs.ARM64_REG_D15 = 55
cs.ARM64_REG_D16 = 56
cs.ARM64_REG_D17 = 57
cs.ARM64_REG_D18 = 58
cs.ARM64_REG_D19 = 59
cs.ARM64_REG_D20 = 60
cs.ARM64_REG_D21 = 61
cs.ARM64_REG_D22 = 62
cs.ARM64_REG_D23 = 63
cs.ARM64_REG_D24 = 64
cs.ARM64_REG_D25 = 65
cs.ARM64_REG_D26 = 66
cs.ARM64_REG_D27 = 67
cs.ARM64_REG_D28 = 68
cs.ARM64_REG_D29 = 69
cs.ARM64_REG_D30 = 70
cs.ARM64_REG_D31 = 71
cs.ARM64_REG_H0 = 72
cs.ARM64_REG_H1 = 73
cs.ARM64_REG_H2 = 74
cs.ARM64_REG_H3 = 75
cs.ARM64_REG_H4 = 76
cs.ARM64_REG_H5 = 77
cs.ARM64_REG_H6 = 78
cs.ARM64_REG_H7 = 79
cs.ARM64_REG_H8 = 80
cs.ARM64_REG_H9 = 81
cs.ARM64_REG_H10 = 82
cs.ARM64_REG_H11 = 83
cs.ARM64_REG_H12 = 84
cs.ARM64_REG_H13 = 85
cs.ARM64_REG_H14 = 86
cs.ARM64_REG_H15 = 87
cs.ARM64_REG_H16 = 88
cs.ARM64_REG_H17 = 89
cs.ARM64_REG_H18 = 90
cs.ARM64_REG_H19 = 91
cs.ARM64_REG_H20 = 92
cs.ARM64_REG_H21 = 93
cs.ARM64_REG_H22 = 94
cs.ARM64_REG_H23 = 95
cs.ARM64_REG_H24 = 96
cs.ARM64_REG_H25 = 97
cs.ARM64_REG_H26 = 98
cs.ARM64_REG_H27 = 99
cs.ARM64_REG_H28 = 100
cs.ARM64_REG_H29 = 101
cs.ARM64_REG_H30 = 102
cs.ARM64_REG_H31 = 103
cs.ARM64_REG_Q0 = 104
cs.ARM64_REG_Q1 = 105
cs.ARM64_REG_Q2 = 106
cs.ARM64_REG_Q3 = 107
cs.ARM64_REG_Q4 = 108
cs.ARM64_REG_Q5 = 109
cs.ARM64_REG_Q6 = 110
cs.ARM64_REG_Q7 = 111
cs.ARM64_REG_Q8 = 112
cs.ARM64_REG_Q9 = 113
cs.ARM64_REG_Q10 = 114
cs.ARM64_REG_Q11 = 115
cs.ARM64_REG_Q12 = 116
cs.ARM64_REG_Q13 = 117
cs.ARM64_REG_Q14 = 118
cs.ARM64_REG_Q15 = 119
cs.ARM64_REG_Q16 = 120
cs.ARM64_REG_Q17 = 121
cs.ARM64_REG_Q18 = 122
cs.ARM64_REG_Q19 = 123
cs.ARM64_REG_Q20 = 124
cs.ARM64_REG_Q21 = 125
cs.ARM64_REG_Q22 = 126
cs.ARM64_REG_Q23 = 127
cs.ARM64_REG_Q24 = 128
cs.ARM64_REG_Q25 = 129
cs.ARM64_REG_Q26 = 130
cs.ARM64_REG_Q27 = 131
cs.ARM64_REG_Q28 = 132
cs.ARM64_REG_Q29 = 133
cs.ARM64_REG_Q30 = 134
cs.ARM64_REG_Q31 = 135
cs.ARM64_REG_S0 = 136
cs.ARM64_REG_S1 = 137
cs.ARM64_REG_S2 = 138
cs.ARM64_REG_S3 = 139
cs.ARM64_REG_S4 = 140
cs.ARM64_REG_S5 = 141
cs.ARM64_REG_S6 = 142
cs.ARM64_REG_S7 = 143
cs.ARM64_REG_S8 = 144
cs.ARM64_REG_S9 = 145
cs.ARM64_REG_S10 = 146
cs.ARM64_REG_S11 = 147
cs.ARM64_REG_S12 = 148
cs.ARM64_REG_S13 = 149
cs.ARM64_REG_S14 = 150
cs.ARM64_REG_S15 = 151
cs.ARM64_REG_S16 = 152
cs.ARM64_REG_S17 = 153
cs.ARM64_REG_S18 = 154
cs.ARM64_REG_S19 = 155
cs.ARM64_REG_S20 = 156
cs.ARM64_REG_S21 = 157
cs.ARM64_REG_S22 = 158
cs.ARM64_REG_S23 = 159
cs.ARM64_REG_S24 = 160
cs.ARM64_REG_S25 = 161
cs.ARM64_REG_S26 = 162
cs.ARM64_REG_S27 = 163
cs.ARM64_REG_S28 = 164
cs.ARM64_REG_S29 = 165
cs.ARM64_REG_S30 = 166
cs.ARM64_REG_S31 = 167
cs.ARM64_REG_W0 = 168
cs.ARM64_REG_W1 = 169
cs.ARM64_REG_W2 = 170
cs.ARM64_REG_W3 = 171
cs.ARM64_REG_W4 = 172
cs.ARM64_REG_W5 = 173
cs.ARM64_REG_W6 = 174
cs.ARM64_REG_W7 = 175
cs.ARM64_REG_W8 = 176
cs.ARM64_REG_W9 = 177
cs.ARM64_REG_W10 = 178
cs.ARM64_REG_W11 = 179
cs.ARM64_REG_W12 = 180
cs.ARM64_REG_W13 = 181
cs.ARM64_REG_W14 = 182
cs.ARM64_REG_W15 = 183
cs.ARM64_REG_W16 = 184
cs.ARM64_REG_W17 = 185
cs.ARM64_REG_W18 = 186
cs.ARM64_REG_W19 = 187
cs.ARM64_REG_W20 = 188
cs.ARM64_REG_W21 = 189
cs.ARM64_REG_W22 = 190
cs.ARM64_REG_W23 = 191
cs.ARM64_REG_W24 = 192
cs.ARM64_REG_W25 = 193
cs.ARM64_REG_W26 = 194
cs.ARM64_REG_W27 = 195
cs.ARM64_REG_W28 = 196
cs.ARM64_REG_W29 = 197
cs.ARM64_REG_W30 = 198
cs.ARM64_REG_X0 = 199
cs.ARM64_REG_X1 = 200
cs.ARM64_REG_X2 = 201
cs.ARM64_REG_X3 = 202
cs.ARM64_REG_X4 = 203
cs.ARM64_REG_X5 = 204
cs.ARM64_REG_X6 = 205
cs.ARM64_REG_X7 = 206
cs.ARM64_REG_X8 = 207
cs.ARM64_REG_X9 = 208
cs.ARM64_REG_X10 = 209
cs.ARM64_REG_X11 = 210
cs.ARM64_REG_X12 = 211
cs.ARM64_REG_X13 = 212
cs.ARM64_REG_X14 = 213
cs.ARM64_REG_X15 = 214
cs.ARM64_REG_X16 = 215
cs.ARM64_REG_X17 = 216
cs.ARM64_REG_X18 = 217
cs.ARM64_REG_X19 = 218
cs.ARM64_REG_X20 = 219
cs.ARM64_REG_X21 = 220
cs.ARM64_REG_X22 = 221
cs.ARM64_REG_X23 = 222
cs.ARM64_REG_X24 = 223
cs.ARM64_REG_X25 = 224
cs.ARM64_REG_X26 = 225
cs.ARM64_REG_X27 = 226
cs.ARM64_REG_X28 = 227
cs.ARM64_REG_V0 = 228
cs.ARM64_REG_V1 = 229
cs.ARM64_REG_V2 = 230
cs.ARM64_REG_V3 = 231
cs.ARM64_REG_V4 = 232
cs.ARM64_REG_V5 = 233
cs.ARM64_REG_V6 = 234
cs.ARM64_REG_V7 = 235
cs.ARM64_REG_V8 = 236
cs.ARM64_REG_V9 = 237
cs.ARM64_REG_V10 = 238
cs.ARM64_REG_V11 = 239
cs.ARM64_REG_V12 = 240
cs.ARM64_REG_V13 = 241
cs.ARM64_REG_V14 = 242
cs.ARM64_REG_V15 = 243
cs.ARM64_REG_V16 = 244
cs.ARM64_REG_V17 = 245
cs.ARM64_REG_V18 = 246
cs.ARM64_REG_V19 = 247
cs.ARM64_REG_V20 = 248
cs.ARM64_REG_V21 = 249
cs.ARM64_REG_V22 = 250
cs.ARM64_REG_V23 = 251
cs.ARM64_REG_V24 = 252
cs.ARM64_REG_V25 = 253
cs.ARM64_REG_V26 = 254
cs.ARM64_REG_V27 = 255
cs.ARM64_REG_V28 = 256
cs.ARM64_REG_V29 = 257
cs.ARM64_REG_V30 = 258
cs.ARM64_REG_V31 = 259
cs.ARM64_REG_ENDING = 260
// alias registers
// cs.ARM64_REG_IP1 = ARM64_REG_X16
// cs.ARM64_REG_IP0 = ARM64_REG_X17
// cs.ARM64_REG_FP = ARM64_REG_X29
// cs.ARM64_REG_LR = ARM64_REG_X30
// ARM64 instruction
cs.ARM64_INS_INVALID = 0
cs.ARM64_INS_ABS = 1
cs.ARM64_INS_ADC = 2
cs.ARM64_INS_ADDHN = 3
cs.ARM64_INS_ADDHN2 = 4
cs.ARM64_INS_ADDP = 5
cs.ARM64_INS_ADD = 6
cs.ARM64_INS_ADDV = 7
cs.ARM64_INS_ADR = 8
cs.ARM64_INS_ADRP = 9
cs.ARM64_INS_AESD = 10
cs.ARM64_INS_AESE = 11
cs.ARM64_INS_AESIMC = 12
cs.ARM64_INS_AESMC = 13
cs.ARM64_INS_AND = 14
cs.ARM64_INS_ASR = 15
cs.ARM64_INS_B = 16
cs.ARM64_INS_BFM = 17
cs.ARM64_INS_BIC = 18
cs.ARM64_INS_BIF = 19
cs.ARM64_INS_BIT = 20
cs.ARM64_INS_BL = 21
cs.ARM64_INS_BLR = 22
cs.ARM64_INS_BR = 23
cs.ARM64_INS_BRK = 24
cs.ARM64_INS_BSL = 25
cs.ARM64_INS_CBNZ = 26
cs.ARM64_INS_CBZ = 27
cs.ARM64_INS_CCMN = 28
cs.ARM64_INS_CCMP = 29
cs.ARM64_INS_CLREX = 30
cs.ARM64_INS_CLS = 31
cs.ARM64_INS_CLZ = 32
cs.ARM64_INS_CMEQ = 33
cs.ARM64_INS_CMGE = 34
cs.ARM64_INS_CMGT = 35
cs.ARM64_INS_CMHI = 36
cs.ARM64_INS_CMHS = 37
cs.ARM64_INS_CMLE = 38
cs.ARM64_INS_CMLT = 39
cs.ARM64_INS_CMTST = 40
cs.ARM64_INS_CNT = 41
cs.ARM64_INS_MOV = 42
cs.ARM64_INS_CRC32B = 43
cs.ARM64_INS_CRC32CB = 44
cs.ARM64_INS_CRC32CH = 45
cs.ARM64_INS_CRC32CW = 46
cs.ARM64_INS_CRC32CX = 47
cs.ARM64_INS_CRC32H = 48
cs.ARM64_INS_CRC32W = 49
cs.ARM64_INS_CRC32X = 50
cs.ARM64_INS_CSEL = 51
cs.ARM64_INS_CSINC = 52
cs.ARM64_INS_CSINV = 53
cs.ARM64_INS_CSNEG = 54
cs.ARM64_INS_DCPS1 = 55
cs.ARM64_INS_DCPS2 = 56
cs.ARM64_INS_DCPS3 = 57
cs.ARM64_INS_DMB = 58
cs.ARM64_INS_DRPS = 59
cs.ARM64_INS_DSB = 60
cs.ARM64_INS_DUP = 61
cs.ARM64_INS_EON = 62
cs.ARM64_INS_EOR = 63
cs.ARM64_INS_ERET = 64
cs.ARM64_INS_EXTR = 65
cs.ARM64_INS_EXT = 66
cs.ARM64_INS_FABD = 67
cs.ARM64_INS_FABS = 68
cs.ARM64_INS_FACGE = 69
cs.ARM64_INS_FACGT = 70
cs.ARM64_INS_FADD = 71
cs.ARM64_INS_FADDP = 72
cs.ARM64_INS_FCCMP = 73
cs.ARM64_INS_FCCMPE = 74
cs.ARM64_INS_FCMEQ = 75
cs.ARM64_INS_FCMGE = 76
cs.ARM64_INS_FCMGT = 77
cs.ARM64_INS_FCMLE = 78
cs.ARM64_INS_FCMLT = 79
cs.ARM64_INS_FCMP = 80
cs.ARM64_INS_FCMPE = 81
cs.ARM64_INS_FCSEL = 82
cs.ARM64_INS_FCVTAS = 83
cs.ARM64_INS_FCVTAU = 84
cs.ARM64_INS_FCVT = 85
cs.ARM64_INS_FCVTL = 86
cs.ARM64_INS_FCVTL2 = 87
cs.ARM64_INS_FCVTMS = 88
cs.ARM64_INS_FCVTMU = 89
cs.ARM64_INS_FCVTNS = 90
cs.ARM64_INS_FCVTNU = 91
cs.ARM64_INS_FCVTN = 92
cs.ARM64_INS_FCVTN2 = 93
cs.ARM64_INS_FCVTPS = 94
cs.ARM64_INS_FCVTPU = 95
cs.ARM64_INS_FCVTXN = 96
cs.ARM64_INS_FCVTXN2 = 97
cs.ARM64_INS_FCVTZS = 98
cs.ARM64_INS_FCVTZU = 99
cs.ARM64_INS_FDIV = 100
cs.ARM64_INS_FMADD = 101
cs.ARM64_INS_FMAX = 102
cs.ARM64_INS_FMAXNM = 103
cs.ARM64_INS_FMAXNMP = 104
cs.ARM64_INS_FMAXNMV = 105
cs.ARM64_INS_FMAXP = 106
cs.ARM64_INS_FMAXV = 107
cs.ARM64_INS_FMIN = 108
cs.ARM64_INS_FMINNM = 109
cs.ARM64_INS_FMINNMP = 110
cs.ARM64_INS_FMINNMV = 111
cs.ARM64_INS_FMINP = 112
cs.ARM64_INS_FMINV = 113
cs.ARM64_INS_FMLA = 114
cs.ARM64_INS_FMLS = 115
cs.ARM64_INS_FMOV = 116
cs.ARM64_INS_FMSUB = 117
cs.ARM64_INS_FMUL = 118
cs.ARM64_INS_FMULX = 119
cs.ARM64_INS_FNEG = 120
cs.ARM64_INS_FNMADD = 121
cs.ARM64_INS_FNMSUB = 122
cs.ARM64_INS_FNMUL = 123
cs.ARM64_INS_FRECPE = 124
cs.ARM64_INS_FRECPS = 125
cs.ARM64_INS_FRECPX = 126
cs.ARM64_INS_FRINTA = 127
cs.ARM64_INS_FRINTI = 128
cs.ARM64_INS_FRINTM = 129
cs.ARM64_INS_FRINTN = 130
cs.ARM64_INS_FRINTP = 131
cs.ARM64_INS_FRINTX = 132
cs.ARM64_INS_FRINTZ = 133
cs.ARM64_INS_FRSQRTE = 134
cs.ARM64_INS_FRSQRTS = 135
cs.ARM64_INS_FSQRT = 136
cs.ARM64_INS_FSUB = 137
cs.ARM64_INS_HINT = 138
cs.ARM64_INS_HLT = 139
cs.ARM64_INS_HVC = 140
cs.ARM64_INS_INS = 141
cs.ARM64_INS_ISB = 142
cs.ARM64_INS_LD1 = 143
cs.ARM64_INS_LD1R = 144
cs.ARM64_INS_LD2R = 145
cs.ARM64_INS_LD2 = 146
cs.ARM64_INS_LD3R = 147
cs.ARM64_INS_LD3 = 148
cs.ARM64_INS_LD4 = 149
cs.ARM64_INS_LD4R = 150
cs.ARM64_INS_LDARB = 151
cs.ARM64_INS_LDARH = 152
cs.ARM64_INS_LDAR = 153
cs.ARM64_INS_LDAXP = 154
cs.ARM64_INS_LDAXRB = 155
cs.ARM64_INS_LDAXRH = 156
cs.ARM64_INS_LDAXR = 157
cs.ARM64_INS_LDNP = 158
cs.ARM64_INS_LDP = 159
cs.ARM64_INS_LDPSW = 160
cs.ARM64_INS_LDRB = 161
cs.ARM64_INS_LDR = 162
cs.ARM64_INS_LDRH = 163
cs.ARM64_INS_LDRSB = 164
cs.ARM64_INS_LDRSH = 165
cs.ARM64_INS_LDRSW = 166
cs.ARM64_INS_LDTRB = 167
cs.ARM64_INS_LDTRH = 168
cs.ARM64_INS_LDTRSB = 169
cs.ARM64_INS_LDTRSH = 170
cs.ARM64_INS_LDTRSW = 171
cs.ARM64_INS_LDTR = 172
cs.ARM64_INS_LDURB = 173
cs.ARM64_INS_LDUR = 174
cs.ARM64_INS_LDURH = 175
cs.ARM64_INS_LDURSB = 176
cs.ARM64_INS_LDURSH = 177
cs.ARM64_INS_LDURSW = 178
cs.ARM64_INS_LDXP = 179
cs.ARM64_INS_LDXRB = 180
cs.ARM64_INS_LDXRH = 181
cs.ARM64_INS_LDXR = 182
cs.ARM64_INS_LSL = 183
cs.ARM64_INS_LSR = 184
cs.ARM64_INS_MADD = 185
cs.ARM64_INS_MLA = 186
cs.ARM64_INS_MLS = 187
cs.ARM64_INS_MOVI = 188
cs.ARM64_INS_MOVK = 189
cs.ARM64_INS_MOVN = 190
cs.ARM64_INS_MOVZ = 191
cs.ARM64_INS_MRS = 192
cs.ARM64_INS_MSR = 193
cs.ARM64_INS_MSUB = 194
cs.ARM64_INS_MUL = 195
cs.ARM64_INS_MVNI = 196
cs.ARM64_INS_NEG = 197
cs.ARM64_INS_NOT = 198
cs.ARM64_INS_ORN = 199
cs.ARM64_INS_ORR = 200
cs.ARM64_INS_PMULL2 = 201
cs.ARM64_INS_PMULL = 202
cs.ARM64_INS_PMUL = 203
cs.ARM64_INS_PRFM = 204
cs.ARM64_INS_PRFUM = 205
cs.ARM64_INS_RADDHN = 206
cs.ARM64_INS_RADDHN2 = 207
cs.ARM64_INS_RBIT = 208
cs.ARM64_INS_RET = 209
cs.ARM64_INS_REV16 = 210
cs.ARM64_INS_REV32 = 211
cs.ARM64_INS_REV64 = 212
cs.ARM64_INS_REV = 213
cs.ARM64_INS_ROR = 214
cs.ARM64_INS_RSHRN2 = 215
cs.ARM64_INS_RSHRN = 216
cs.ARM64_INS_RSUBHN = 217
cs.ARM64_INS_RSUBHN2 = 218
cs.ARM64_INS_SABAL2 = 219
cs.ARM64_INS_SABAL = 220
cs.ARM64_INS_SABA = 221
cs.ARM64_INS_SABDL2 = 222
cs.ARM64_INS_SABDL = 223
cs.ARM64_INS_SABD = 224
cs.ARM64_INS_SADALP = 225
cs.ARM64_INS_SADDLP = 226
cs.ARM64_INS_SADDLV = 227
cs.ARM64_INS_SADDL2 = 228
cs.ARM64_INS_SADDL = 229
cs.ARM64_INS_SADDW2 = 230
cs.ARM64_INS_SADDW = 231
cs.ARM64_INS_SBC = 232
cs.ARM64_INS_SBFM = 233
cs.ARM64_INS_SCVTF = 234
cs.ARM64_INS_SDIV = 235
cs.ARM64_INS_SHA1C = 236
cs.ARM64_INS_SHA1H = 237
cs.ARM64_INS_SHA1M = 238
cs.ARM64_INS_SHA1P = 239
cs.ARM64_INS_SHA1SU0 = 240
cs.ARM64_INS_SHA1SU1 = 241
cs.ARM64_INS_SHA256H2 = 242
cs.ARM64_INS_SHA256H = 243
cs.ARM64_INS_SHA256SU0 = 244
cs.ARM64_INS_SHA256SU1 = 245
cs.ARM64_INS_SHADD = 246
cs.ARM64_INS_SHLL2 = 247
cs.ARM64_INS_SHLL = 248
cs.ARM64_INS_SHL = 249
cs.ARM64_INS_SHRN2 = 250
cs.ARM64_INS_SHRN = 251
cs.ARM64_INS_SHSUB = 252
cs.ARM64_INS_SLI = 253
cs.ARM64_INS_SMADDL = 254
cs.ARM64_INS_SMAXP = 255
cs.ARM64_INS_SMAXV = 256
cs.ARM64_INS_SMAX = 257
cs.ARM64_INS_SMC = 258
cs.ARM64_INS_SMINP = 259
cs.ARM64_INS_SMINV = 260
cs.ARM64_INS_SMIN = 261
cs.ARM64_INS_SMLAL2 = 262
cs.ARM64_INS_SMLAL = 263
cs.ARM64_INS_SMLSL2 = 264
cs.ARM64_INS_SMLSL = 265
cs.ARM64_INS_SMOV = 266
cs.ARM64_INS_SMSUBL = 267
cs.ARM64_INS_SMULH = 268
cs.ARM64_INS_SMULL2 = 269
cs.ARM64_INS_SMULL = 270
cs.ARM64_INS_SQABS = 271
cs.ARM64_INS_SQADD = 272
cs.ARM64_INS_SQDMLAL = 273
cs.ARM64_INS_SQDMLAL2 = 274
cs.ARM64_INS_SQDMLSL = 275
cs.ARM64_INS_SQDMLSL2 = 276
cs.ARM64_INS_SQDMULH = 277
cs.ARM64_INS_SQDMULL = 278
cs.ARM64_INS_SQDMULL2 = 279
cs.ARM64_INS_SQNEG = 280
cs.ARM64_INS_SQRDMULH = 281
cs.ARM64_INS_SQRSHL = 282
cs.ARM64_INS_SQRSHRN = 283
cs.ARM64_INS_SQRSHRN2 = 284
cs.ARM64_INS_SQRSHRUN = 285
cs.ARM64_INS_SQRSHRUN2 = 286
cs.ARM64_INS_SQSHLU = 287
cs.ARM64_INS_SQSHL = 288
cs.ARM64_INS_SQSHRN = 289
cs.ARM64_INS_SQSHRN2 = 290
cs.ARM64_INS_SQSHRUN = 291
cs.ARM64_INS_SQSHRUN2 = 292
cs.ARM64_INS_SQSUB = 293
cs.ARM64_INS_SQXTN2 = 294
cs.ARM64_INS_SQXTN = 295
cs.ARM64_INS_SQXTUN2 = 296
cs.ARM64_INS_SQXTUN = 297
cs.ARM64_INS_SRHADD = 298
cs.ARM64_INS_SRI = 299
cs.ARM64_INS_SRSHL = 300
cs.ARM64_INS_SRSHR = 301
cs.ARM64_INS_SRSRA = 302
cs.ARM64_INS_SSHLL2 = 303
cs.ARM64_INS_SSHLL = 304
cs.ARM64_INS_SSHL = 305
cs.ARM64_INS_SSHR = 306
cs.ARM64_INS_SSRA = 307
cs.ARM64_INS_SSUBL2 = 308
cs.ARM64_INS_SSUBL = 309
cs.ARM64_INS_SSUBW2 = 310
cs.ARM64_INS_SSUBW = 311
cs.ARM64_INS_ST1 = 312
cs.ARM64_INS_ST2 = 313
cs.ARM64_INS_ST3 = 314
cs.ARM64_INS_ST4 = 315
cs.ARM64_INS_STLRB = 316
cs.ARM64_INS_STLRH = 317
cs.ARM64_INS_STLR = 318
cs.ARM64_INS_STLXP = 319
cs.ARM64_INS_STLXRB = 320
cs.ARM64_INS_STLXRH = 321
cs.ARM64_INS_STLXR = 322
cs.ARM64_INS_STNP = 323
cs.ARM64_INS_STP = 324
cs.ARM64_INS_STRB = 325
cs.ARM64_INS_STR = 326
cs.ARM64_INS_STRH = 327
cs.ARM64_INS_STTRB = 328
cs.ARM64_INS_STTRH = 329
cs.ARM64_INS_STTR = 330
cs.ARM64_INS_STURB = 331
cs.ARM64_INS_STUR = 332
cs.ARM64_INS_STURH = 333
cs.ARM64_INS_STXP = 334
cs.ARM64_INS_STXRB = 335
cs.ARM64_INS_STXRH = 336
cs.ARM64_INS_STXR = 337
cs.ARM64_INS_SUBHN = 338
cs.ARM64_INS_SUBHN2 = 339
cs.ARM64_INS_SUB = 340
cs.ARM64_INS_SUQADD = 341
cs.ARM64_INS_SVC = 342
cs.ARM64_INS_SYSL = 343
cs.ARM64_INS_SYS = 344
cs.ARM64_INS_TBL = 345
cs.ARM64_INS_TBNZ = 346
cs.ARM64_INS_TBX = 347
cs.ARM64_INS_TBZ = 348
cs.ARM64_INS_TRN1 = 349
cs.ARM64_INS_TRN2 = 350
cs.ARM64_INS_UABAL2 = 351
cs.ARM64_INS_UABAL = 352
cs.ARM64_INS_UABA = 353
cs.ARM64_INS_UABDL2 = 354
cs.ARM64_INS_UABDL = 355
cs.ARM64_INS_UABD = 356
cs.ARM64_INS_UADALP = 357
cs.ARM64_INS_UADDLP = 358
cs.ARM64_INS_UADDLV = 359
cs.ARM64_INS_UADDL2 = 360
cs.ARM64_INS_UADDL = 361
cs.ARM64_INS_UADDW2 = 362
cs.ARM64_INS_UADDW = 363
cs.ARM64_INS_UBFM = 364
cs.ARM64_INS_UCVTF = 365
cs.ARM64_INS_UDIV = 366
cs.ARM64_INS_UHADD = 367
cs.ARM64_INS_UHSUB = 368
cs.ARM64_INS_UMADDL = 369
cs.ARM64_INS_UMAXP = 370
cs.ARM64_INS_UMAXV = 371
cs.ARM64_INS_UMAX = 372
cs.ARM64_INS_UMINP = 373
cs.ARM64_INS_UMINV = 374
cs.ARM64_INS_UMIN = 375
cs.ARM64_INS_UMLAL2 = 376
cs.ARM64_INS_UMLAL = 377
cs.ARM64_INS_UMLSL2 = 378
cs.ARM64_INS_UMLSL = 379
cs.ARM64_INS_UMOV = 380
cs.ARM64_INS_UMSUBL = 381
cs.ARM64_INS_UMULH = 382
cs.ARM64_INS_UMULL2 = 383
cs.ARM64_INS_UMULL = 384
cs.ARM64_INS_UQADD = 385
cs.ARM64_INS_UQRSHL = 386
cs.ARM64_INS_UQRSHRN = 387
cs.ARM64_INS_UQRSHRN2 = 388
cs.ARM64_INS_UQSHL = 389
cs.ARM64_INS_UQSHRN = 390
cs.ARM64_INS_UQSHRN2 = 391
cs.ARM64_INS_UQSUB = 392
cs.ARM64_INS_UQXTN2 = 393
cs.ARM64_INS_UQXTN = 394
cs.ARM64_INS_URECPE = 395
cs.ARM64_INS_URHADD = 396
cs.ARM64_INS_URSHL = 397
cs.ARM64_INS_URSHR = 398
cs.ARM64_INS_URSQRTE = 399
cs.ARM64_INS_URSRA = 400
cs.ARM64_INS_USHLL2 = 401
cs.ARM64_INS_USHLL = 402
cs.ARM64_INS_USHL = 403
cs.ARM64_INS_USHR = 404
cs.ARM64_INS_USQADD = 405
cs.ARM64_INS_USRA = 406
cs.ARM64_INS_USUBL2 = 407
cs.ARM64_INS_USUBL = 408
cs.ARM64_INS_USUBW2 = 409
cs.ARM64_INS_USUBW = 410
cs.ARM64_INS_UZP1 = 411
cs.ARM64_INS_UZP2 = 412
cs.ARM64_INS_XTN2 = 413
cs.ARM64_INS_XTN = 414
cs.ARM64_INS_ZIP1 = 415
cs.ARM64_INS_ZIP2 = 416
cs.ARM64_INS_MNEG = 417
cs.ARM64_INS_UMNEGL = 418
cs.ARM64_INS_SMNEGL = 419
cs.ARM64_INS_NOP = 420
cs.ARM64_INS_YIELD = 421
cs.ARM64_INS_WFE = 422
cs.ARM64_INS_WFI = 423
cs.ARM64_INS_SEV = 424
cs.ARM64_INS_SEVL = 425
cs.ARM64_INS_NGC = 426
cs.ARM64_INS_SBFIZ = 427
cs.ARM64_INS_UBFIZ = 428
cs.ARM64_INS_SBFX = 429
cs.ARM64_INS_UBFX = 430
cs.ARM64_INS_BFI = 431
cs.ARM64_INS_BFXIL = 432
cs.ARM64_INS_CMN = 433
cs.ARM64_INS_MVN = 434
cs.ARM64_INS_TST = 435
cs.ARM64_INS_CSET = 436
cs.ARM64_INS_CINC = 437
cs.ARM64_INS_CSETM = 438
cs.ARM64_INS_CINV = 439
cs.ARM64_INS_CNEG = 440
cs.ARM64_INS_SXTB = 441
cs.ARM64_INS_SXTH = 442
cs.ARM64_INS_SXTW = 443
cs.ARM64_INS_CMP = 444
cs.ARM64_INS_UXTB = 445
cs.ARM64_INS_UXTH = 446
cs.ARM64_INS_UXTW = 447
cs.ARM64_INS_IC = 448
cs.ARM64_INS_DC = 449
cs.ARM64_INS_AT = 450
cs.ARM64_INS_TLBI = 451
cs.ARM64_INS_ENDING = 452
// Group of ARM64 instructions
cs.ARM64_GRP_INVALID = 0
// Generic groups
cs.ARM64_GRP_JUMP = 1
// Architecture-specific groups
cs.ARM64_GRP_CRYPTO = 128
cs.ARM64_GRP_FPARMV8 = 129
cs.ARM64_GRP_NEON = 130
cs.ARM64_GRP_CRC = 131
cs.ARM64_GRP_ENDING = 132
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [arm_const.py]
// ARM shift type
cs.ARM_SFT_INVALID = 0
cs.ARM_SFT_ASR = 1
cs.ARM_SFT_LSL = 2
cs.ARM_SFT_LSR = 3
cs.ARM_SFT_ROR = 4
cs.ARM_SFT_RRX = 5
cs.ARM_SFT_ASR_REG = 6
cs.ARM_SFT_LSL_REG = 7
cs.ARM_SFT_LSR_REG = 8
cs.ARM_SFT_ROR_REG = 9
cs.ARM_SFT_RRX_REG = 10
// ARM condition code
cs.ARM_CC_INVALID = 0
cs.ARM_CC_EQ = 1
cs.ARM_CC_NE = 2
cs.ARM_CC_HS = 3
cs.ARM_CC_LO = 4
cs.ARM_CC_MI = 5
cs.ARM_CC_PL = 6
cs.ARM_CC_VS = 7
cs.ARM_CC_VC = 8
cs.ARM_CC_HI = 9
cs.ARM_CC_LS = 10
cs.ARM_CC_GE = 11
cs.ARM_CC_LT = 12
cs.ARM_CC_GT = 13
cs.ARM_CC_LE = 14
cs.ARM_CC_AL = 15
// Special registers for MSR
cs.ARM_SYSREG_INVALID = 0
cs.ARM_SYSREG_SPSR_C = 1
cs.ARM_SYSREG_SPSR_X = 2
cs.ARM_SYSREG_SPSR_S = 4
cs.ARM_SYSREG_SPSR_F = 8
cs.ARM_SYSREG_CPSR_C = 16
cs.ARM_SYSREG_CPSR_X = 32
cs.ARM_SYSREG_CPSR_S = 64
cs.ARM_SYSREG_CPSR_F = 128
cs.ARM_SYSREG_APSR = 256
cs.ARM_SYSREG_APSR_G = 257
cs.ARM_SYSREG_APSR_NZCVQ = 258
cs.ARM_SYSREG_APSR_NZCVQG = 259
cs.ARM_SYSREG_IAPSR = 260
cs.ARM_SYSREG_IAPSR_G = 261
cs.ARM_SYSREG_IAPSR_NZCVQG = 262
cs.ARM_SYSREG_EAPSR = 263
cs.ARM_SYSREG_EAPSR_G = 264
cs.ARM_SYSREG_EAPSR_NZCVQG = 265
cs.ARM_SYSREG_XPSR = 266
cs.ARM_SYSREG_XPSR_G = 267
cs.ARM_SYSREG_XPSR_NZCVQG = 268
cs.ARM_SYSREG_IPSR = 269
cs.ARM_SYSREG_EPSR = 270
cs.ARM_SYSREG_IEPSR = 271
cs.ARM_SYSREG_MSP = 272
cs.ARM_SYSREG_PSP = 273
cs.ARM_SYSREG_PRIMASK = 274
cs.ARM_SYSREG_BASEPRI = 275
cs.ARM_SYSREG_BASEPRI_MAX = 276
cs.ARM_SYSREG_FAULTMASK = 277
cs.ARM_SYSREG_CONTROL = 278
// The memory barrier constants map directly to the 4-bit encoding of
// the option field for Memory Barrier operations.
cs.ARM_MB_INVALID = 0
cs.ARM_MB_RESERVED_0 = 1
cs.ARM_MB_OSHLD = 2
cs.ARM_MB_OSHST = 3
cs.ARM_MB_OSH = 4
cs.ARM_MB_RESERVED_4 = 5
cs.ARM_MB_NSHLD = 6
cs.ARM_MB_NSHST = 7
cs.ARM_MB_NSH = 8
cs.ARM_MB_RESERVED_8 = 9
cs.ARM_MB_ISHLD = 10
cs.ARM_MB_ISHST = 11
cs.ARM_MB_ISH = 12
cs.ARM_MB_RESERVED_12 = 13
cs.ARM_MB_LD = 14
cs.ARM_MB_ST = 15
cs.ARM_MB_SY = 16
// Operand type for instruction's operands
cs.ARM_OP_INVALID = 0
cs.ARM_OP_REG = 1
cs.ARM_OP_IMM = 2
cs.ARM_OP_MEM = 3
cs.ARM_OP_FP = 4
cs.ARM_OP_CIMM = 64
cs.ARM_OP_PIMM = 65
cs.ARM_OP_SETEND = 66
cs.ARM_OP_SYSREG = 67
// Operand type for SETEND instruction
cs.ARM_SETEND_INVALID = 0
cs.ARM_SETEND_BE = 1
cs.ARM_SETEND_LE = 2
cs.ARM_CPSMODE_INVALID = 0
cs.ARM_CPSMODE_IE = 2
cs.ARM_CPSMODE_ID = 3
// Operand type for SETEND instruction
cs.ARM_CPSFLAG_INVALID = 0
cs.ARM_CPSFLAG_F = 1
cs.ARM_CPSFLAG_I = 2
cs.ARM_CPSFLAG_A = 4
cs.ARM_CPSFLAG_NONE = 16
// Data type for elements of vector instructions.
cs.ARM_VECTORDATA_INVALID = 0
cs.ARM_VECTORDATA_I8 = 1
cs.ARM_VECTORDATA_I16 = 2
cs.ARM_VECTORDATA_I32 = 3
cs.ARM_VECTORDATA_I64 = 4
cs.ARM_VECTORDATA_S8 = 5
cs.ARM_VECTORDATA_S16 = 6
cs.ARM_VECTORDATA_S32 = 7
cs.ARM_VECTORDATA_S64 = 8
cs.ARM_VECTORDATA_U8 = 9
cs.ARM_VECTORDATA_U16 = 10
cs.ARM_VECTORDATA_U32 = 11
cs.ARM_VECTORDATA_U64 = 12
cs.ARM_VECTORDATA_P8 = 13
cs.ARM_VECTORDATA_F32 = 14
cs.ARM_VECTORDATA_F64 = 15
cs.ARM_VECTORDATA_F16F64 = 16
cs.ARM_VECTORDATA_F64F16 = 17
cs.ARM_VECTORDATA_F32F16 = 18
cs.ARM_VECTORDATA_F16F32 = 19
cs.ARM_VECTORDATA_F64F32 = 20
cs.ARM_VECTORDATA_F32F64 = 21
cs.ARM_VECTORDATA_S32F32 = 22
cs.ARM_VECTORDATA_U32F32 = 23
cs.ARM_VECTORDATA_F32S32 = 24
cs.ARM_VECTORDATA_F32U32 = 25
cs.ARM_VECTORDATA_F64S16 = 26
cs.ARM_VECTORDATA_F32S16 = 27
cs.ARM_VECTORDATA_F64S32 = 28
cs.ARM_VECTORDATA_S16F64 = 29
cs.ARM_VECTORDATA_S16F32 = 30
cs.ARM_VECTORDATA_S32F64 = 31
cs.ARM_VECTORDATA_U16F64 = 32
cs.ARM_VECTORDATA_U16F32 = 33
cs.ARM_VECTORDATA_U32F64 = 34
cs.ARM_VECTORDATA_F64U16 = 35
cs.ARM_VECTORDATA_F32U16 = 36
cs.ARM_VECTORDATA_F64U32 = 37
// ARM registers
cs.ARM_REG_INVALID = 0
cs.ARM_REG_APSR = 1
cs.ARM_REG_APSR_NZCV = 2
cs.ARM_REG_CPSR = 3
cs.ARM_REG_FPEXC = 4
cs.ARM_REG_FPINST = 5
cs.ARM_REG_FPSCR = 6
cs.ARM_REG_FPSCR_NZCV = 7
cs.ARM_REG_FPSID = 8
cs.ARM_REG_ITSTATE = 9
cs.ARM_REG_LR = 10
cs.ARM_REG_PC = 11
cs.ARM_REG_SP = 12
cs.ARM_REG_SPSR = 13
cs.ARM_REG_D0 = 14
cs.ARM_REG_D1 = 15
cs.ARM_REG_D2 = 16
cs.ARM_REG_D3 = 17
cs.ARM_REG_D4 = 18
cs.ARM_REG_D5 = 19
cs.ARM_REG_D6 = 20
cs.ARM_REG_D7 = 21
cs.ARM_REG_D8 = 22
cs.ARM_REG_D9 = 23
cs.ARM_REG_D10 = 24
cs.ARM_REG_D11 = 25
cs.ARM_REG_D12 = 26
cs.ARM_REG_D13 = 27
cs.ARM_REG_D14 = 28
cs.ARM_REG_D15 = 29
cs.ARM_REG_D16 = 30
cs.ARM_REG_D17 = 31
cs.ARM_REG_D18 = 32
cs.ARM_REG_D19 = 33
cs.ARM_REG_D20 = 34
cs.ARM_REG_D21 = 35
cs.ARM_REG_D22 = 36
cs.ARM_REG_D23 = 37
cs.ARM_REG_D24 = 38
cs.ARM_REG_D25 = 39
cs.ARM_REG_D26 = 40
cs.ARM_REG_D27 = 41
cs.ARM_REG_D28 = 42
cs.ARM_REG_D29 = 43
cs.ARM_REG_D30 = 44
cs.ARM_REG_D31 = 45
cs.ARM_REG_FPINST2 = 46
cs.ARM_REG_MVFR0 = 47
cs.ARM_REG_MVFR1 = 48
cs.ARM_REG_MVFR2 = 49
cs.ARM_REG_Q0 = 50
cs.ARM_REG_Q1 = 51
cs.ARM_REG_Q2 = 52
cs.ARM_REG_Q3 = 53
cs.ARM_REG_Q4 = 54
cs.ARM_REG_Q5 = 55
cs.ARM_REG_Q6 = 56
cs.ARM_REG_Q7 = 57
cs.ARM_REG_Q8 = 58
cs.ARM_REG_Q9 = 59
cs.ARM_REG_Q10 = 60
cs.ARM_REG_Q11 = 61
cs.ARM_REG_Q12 = 62
cs.ARM_REG_Q13 = 63
cs.ARM_REG_Q14 = 64
cs.ARM_REG_Q15 = 65
cs.ARM_REG_R0 = 66
cs.ARM_REG_R1 = 67
cs.ARM_REG_R2 = 68
cs.ARM_REG_R3 = 69
cs.ARM_REG_R4 = 70
cs.ARM_REG_R5 = 71
cs.ARM_REG_R6 = 72
cs.ARM_REG_R7 = 73
cs.ARM_REG_R8 = 74
cs.ARM_REG_R9 = 75
cs.ARM_REG_R10 = 76
cs.ARM_REG_R11 = 77
cs.ARM_REG_R12 = 78
cs.ARM_REG_S0 = 79
cs.ARM_REG_S1 = 80
cs.ARM_REG_S2 = 81
cs.ARM_REG_S3 = 82
cs.ARM_REG_S4 = 83
cs.ARM_REG_S5 = 84
cs.ARM_REG_S6 = 85
cs.ARM_REG_S7 = 86
cs.ARM_REG_S8 = 87
cs.ARM_REG_S9 = 88
cs.ARM_REG_S10 = 89
cs.ARM_REG_S11 = 90
cs.ARM_REG_S12 = 91
cs.ARM_REG_S13 = 92
cs.ARM_REG_S14 = 93
cs.ARM_REG_S15 = 94
cs.ARM_REG_S16 = 95
cs.ARM_REG_S17 = 96
cs.ARM_REG_S18 = 97
cs.ARM_REG_S19 = 98
cs.ARM_REG_S20 = 99
cs.ARM_REG_S21 = 100
cs.ARM_REG_S22 = 101
cs.ARM_REG_S23 = 102
cs.ARM_REG_S24 = 103
cs.ARM_REG_S25 = 104
cs.ARM_REG_S26 = 105
cs.ARM_REG_S27 = 106
cs.ARM_REG_S28 = 107
cs.ARM_REG_S29 = 108
cs.ARM_REG_S30 = 109
cs.ARM_REG_S31 = 110
cs.ARM_REG_ENDING = 111
// alias registers
// cs.ARM_REG_R13 = ARM_REG_SP
// cs.ARM_REG_R14 = ARM_REG_LR
// cs.ARM_REG_R15 = ARM_REG_PC
// cs.ARM_REG_SB = ARM_REG_R9
// cs.ARM_REG_SL = ARM_REG_R10
// cs.ARM_REG_FP = ARM_REG_R11
// cs.ARM_REG_IP = ARM_REG_R12
// ARM instruction
cs.ARM_INS_INVALID = 0
cs.ARM_INS_ADC = 1
cs.ARM_INS_ADD = 2
cs.ARM_INS_ADR = 3
cs.ARM_INS_AESD = 4
cs.ARM_INS_AESE = 5
cs.ARM_INS_AESIMC = 6
cs.ARM_INS_AESMC = 7
cs.ARM_INS_AND = 8
cs.ARM_INS_BFC = 9
cs.ARM_INS_BFI = 10
cs.ARM_INS_BIC = 11
cs.ARM_INS_BKPT = 12
cs.ARM_INS_BL = 13
cs.ARM_INS_BLX = 14
cs.ARM_INS_BX = 15
cs.ARM_INS_BXJ = 16
cs.ARM_INS_B = 17
cs.ARM_INS_CDP = 18
cs.ARM_INS_CDP2 = 19
cs.ARM_INS_CLREX = 20
cs.ARM_INS_CLZ = 21
cs.ARM_INS_CMN = 22
cs.ARM_INS_CMP = 23
cs.ARM_INS_CPS = 24
cs.ARM_INS_CRC32B = 25
cs.ARM_INS_CRC32CB = 26
cs.ARM_INS_CRC32CH = 27
cs.ARM_INS_CRC32CW = 28
cs.ARM_INS_CRC32H = 29
cs.ARM_INS_CRC32W = 30
cs.ARM_INS_DBG = 31
cs.ARM_INS_DMB = 32
cs.ARM_INS_DSB = 33
cs.ARM_INS_EOR = 34
cs.ARM_INS_VMOV = 35
cs.ARM_INS_FLDMDBX = 36
cs.ARM_INS_FLDMIAX = 37
cs.ARM_INS_VMRS = 38
cs.ARM_INS_FSTMDBX = 39
cs.ARM_INS_FSTMIAX = 40
cs.ARM_INS_HINT = 41
cs.ARM_INS_HLT = 42
cs.ARM_INS_ISB = 43
cs.ARM_INS_LDA = 44
cs.ARM_INS_LDAB = 45
cs.ARM_INS_LDAEX = 46
cs.ARM_INS_LDAEXB = 47
cs.ARM_INS_LDAEXD = 48
cs.ARM_INS_LDAEXH = 49
cs.ARM_INS_LDAH = 50
cs.ARM_INS_LDC2L = 51
cs.ARM_INS_LDC2 = 52
cs.ARM_INS_LDCL = 53
cs.ARM_INS_LDC = 54
cs.ARM_INS_LDMDA = 55
cs.ARM_INS_LDMDB = 56
cs.ARM_INS_LDM = 57
cs.ARM_INS_LDMIB = 58
cs.ARM_INS_LDRBT = 59
cs.ARM_INS_LDRB = 60
cs.ARM_INS_LDRD = 61
cs.ARM_INS_LDREX = 62
cs.ARM_INS_LDREXB = 63
cs.ARM_INS_LDREXD = 64
cs.ARM_INS_LDREXH = 65
cs.ARM_INS_LDRH = 66
cs.ARM_INS_LDRHT = 67
cs.ARM_INS_LDRSB = 68
cs.ARM_INS_LDRSBT = 69
cs.ARM_INS_LDRSH = 70
cs.ARM_INS_LDRSHT = 71
cs.ARM_INS_LDRT = 72
cs.ARM_INS_LDR = 73
cs.ARM_INS_MCR = 74
cs.ARM_INS_MCR2 = 75
cs.ARM_INS_MCRR = 76
cs.ARM_INS_MCRR2 = 77
cs.ARM_INS_MLA = 78
cs.ARM_INS_MLS = 79
cs.ARM_INS_MOV = 80
cs.ARM_INS_MOVT = 81
cs.ARM_INS_MOVW = 82
cs.ARM_INS_MRC = 83
cs.ARM_INS_MRC2 = 84
cs.ARM_INS_MRRC = 85
cs.ARM_INS_MRRC2 = 86
cs.ARM_INS_MRS = 87
cs.ARM_INS_MSR = 88
cs.ARM_INS_MUL = 89
cs.ARM_INS_MVN = 90
cs.ARM_INS_ORR = 91
cs.ARM_INS_PKHBT = 92
cs.ARM_INS_PKHTB = 93
cs.ARM_INS_PLDW = 94
cs.ARM_INS_PLD = 95
cs.ARM_INS_PLI = 96
cs.ARM_INS_QADD = 97
cs.ARM_INS_QADD16 = 98
cs.ARM_INS_QADD8 = 99
cs.ARM_INS_QASX = 100
cs.ARM_INS_QDADD = 101
cs.ARM_INS_QDSUB = 102
cs.ARM_INS_QSAX = 103
cs.ARM_INS_QSUB = 104
cs.ARM_INS_QSUB16 = 105
cs.ARM_INS_QSUB8 = 106
cs.ARM_INS_RBIT = 107
cs.ARM_INS_REV = 108
cs.ARM_INS_REV16 = 109
cs.ARM_INS_REVSH = 110
cs.ARM_INS_RFEDA = 111
cs.ARM_INS_RFEDB = 112
cs.ARM_INS_RFEIA = 113
cs.ARM_INS_RFEIB = 114
cs.ARM_INS_RSB = 115
cs.ARM_INS_RSC = 116
cs.ARM_INS_SADD16 = 117
cs.ARM_INS_SADD8 = 118
cs.ARM_INS_SASX = 119
cs.ARM_INS_SBC = 120
cs.ARM_INS_SBFX = 121
cs.ARM_INS_SDIV = 122
cs.ARM_INS_SEL = 123
cs.ARM_INS_SETEND = 124
cs.ARM_INS_SHA1C = 125
cs.ARM_INS_SHA1H = 126
cs.ARM_INS_SHA1M = 127
cs.ARM_INS_SHA1P = 128
cs.ARM_INS_SHA1SU0 = 129
cs.ARM_INS_SHA1SU1 = 130
cs.ARM_INS_SHA256H = 131
cs.ARM_INS_SHA256H2 = 132
cs.ARM_INS_SHA256SU0 = 133
cs.ARM_INS_SHA256SU1 = 134
cs.ARM_INS_SHADD16 = 135
cs.ARM_INS_SHADD8 = 136
cs.ARM_INS_SHASX = 137
cs.ARM_INS_SHSAX = 138
cs.ARM_INS_SHSUB16 = 139
cs.ARM_INS_SHSUB8 = 140
cs.ARM_INS_SMC = 141
cs.ARM_INS_SMLABB = 142
cs.ARM_INS_SMLABT = 143
cs.ARM_INS_SMLAD = 144
cs.ARM_INS_SMLADX = 145
cs.ARM_INS_SMLAL = 146
cs.ARM_INS_SMLALBB = 147
cs.ARM_INS_SMLALBT = 148
cs.ARM_INS_SMLALD = 149
cs.ARM_INS_SMLALDX = 150
cs.ARM_INS_SMLALTB = 151
cs.ARM_INS_SMLALTT = 152
cs.ARM_INS_SMLATB = 153
cs.ARM_INS_SMLATT = 154
cs.ARM_INS_SMLAWB = 155
cs.ARM_INS_SMLAWT = 156
cs.ARM_INS_SMLSD = 157
cs.ARM_INS_SMLSDX = 158
cs.ARM_INS_SMLSLD = 159
cs.ARM_INS_SMLSLDX = 160
cs.ARM_INS_SMMLA = 161
cs.ARM_INS_SMMLAR = 162
cs.ARM_INS_SMMLS = 163
cs.ARM_INS_SMMLSR = 164
cs.ARM_INS_SMMUL = 165
cs.ARM_INS_SMMULR = 166
cs.ARM_INS_SMUAD = 167
cs.ARM_INS_SMUADX = 168
cs.ARM_INS_SMULBB = 169
cs.ARM_INS_SMULBT = 170
cs.ARM_INS_SMULL = 171
cs.ARM_INS_SMULTB = 172
cs.ARM_INS_SMULTT = 173
cs.ARM_INS_SMULWB = 174
cs.ARM_INS_SMULWT = 175
cs.ARM_INS_SMUSD = 176
cs.ARM_INS_SMUSDX = 177
cs.ARM_INS_SRSDA = 178
cs.ARM_INS_SRSDB = 179
cs.ARM_INS_SRSIA = 180
cs.ARM_INS_SRSIB = 181
cs.ARM_INS_SSAT = 182
cs.ARM_INS_SSAT16 = 183
cs.ARM_INS_SSAX = 184
cs.ARM_INS_SSUB16 = 185
cs.ARM_INS_SSUB8 = 186
cs.ARM_INS_STC2L = 187
cs.ARM_INS_STC2 = 188
cs.ARM_INS_STCL = 189
cs.ARM_INS_STC = 190
cs.ARM_INS_STL = 191
cs.ARM_INS_STLB = 192
cs.ARM_INS_STLEX = 193
cs.ARM_INS_STLEXB = 194
cs.ARM_INS_STLEXD = 195
cs.ARM_INS_STLEXH = 196
cs.ARM_INS_STLH = 197
cs.ARM_INS_STMDA = 198
cs.ARM_INS_STMDB = 199
cs.ARM_INS_STM = 200
cs.ARM_INS_STMIB = 201
cs.ARM_INS_STRBT = 202
cs.ARM_INS_STRB = 203
cs.ARM_INS_STRD = 204
cs.ARM_INS_STREX = 205
cs.ARM_INS_STREXB = 206
cs.ARM_INS_STREXD = 207
cs.ARM_INS_STREXH = 208
cs.ARM_INS_STRH = 209
cs.ARM_INS_STRHT = 210
cs.ARM_INS_STRT = 211
cs.ARM_INS_STR = 212
cs.ARM_INS_SUB = 213
cs.ARM_INS_SVC = 214
cs.ARM_INS_SWP = 215
cs.ARM_INS_SWPB = 216
cs.ARM_INS_SXTAB = 217
cs.ARM_INS_SXTAB16 = 218
cs.ARM_INS_SXTAH = 219
cs.ARM_INS_SXTB = 220
cs.ARM_INS_SXTB16 = 221
cs.ARM_INS_SXTH = 222
cs.ARM_INS_TEQ = 223
cs.ARM_INS_TRAP = 224
cs.ARM_INS_TST = 225
cs.ARM_INS_UADD16 = 226
cs.ARM_INS_UADD8 = 227
cs.ARM_INS_UASX = 228
cs.ARM_INS_UBFX = 229
cs.ARM_INS_UDF = 230
cs.ARM_INS_UDIV = 231
cs.ARM_INS_UHADD16 = 232
cs.ARM_INS_UHADD8 = 233
cs.ARM_INS_UHASX = 234
cs.ARM_INS_UHSAX = 235
cs.ARM_INS_UHSUB16 = 236
cs.ARM_INS_UHSUB8 = 237
cs.ARM_INS_UMAAL = 238
cs.ARM_INS_UMLAL = 239
cs.ARM_INS_UMULL = 240
cs.ARM_INS_UQADD16 = 241
cs.ARM_INS_UQADD8 = 242
cs.ARM_INS_UQASX = 243
cs.ARM_INS_UQSAX = 244
cs.ARM_INS_UQSUB16 = 245
cs.ARM_INS_UQSUB8 = 246
cs.ARM_INS_USAD8 = 247
cs.ARM_INS_USADA8 = 248
cs.ARM_INS_USAT = 249
cs.ARM_INS_USAT16 = 250
cs.ARM_INS_USAX = 251
cs.ARM_INS_USUB16 = 252
cs.ARM_INS_USUB8 = 253
cs.ARM_INS_UXTAB = 254
cs.ARM_INS_UXTAB16 = 255
cs.ARM_INS_UXTAH = 256
cs.ARM_INS_UXTB = 257
cs.ARM_INS_UXTB16 = 258
cs.ARM_INS_UXTH = 259
cs.ARM_INS_VABAL = 260
cs.ARM_INS_VABA = 261
cs.ARM_INS_VABDL = 262
cs.ARM_INS_VABD = 263
cs.ARM_INS_VABS = 264
cs.ARM_INS_VACGE = 265
cs.ARM_INS_VACGT = 266
cs.ARM_INS_VADD = 267
cs.ARM_INS_VADDHN = 268
cs.ARM_INS_VADDL = 269
cs.ARM_INS_VADDW = 270
cs.ARM_INS_VAND = 271
cs.ARM_INS_VBIC = 272
cs.ARM_INS_VBIF = 273
cs.ARM_INS_VBIT = 274
cs.ARM_INS_VBSL = 275
cs.ARM_INS_VCEQ = 276
cs.ARM_INS_VCGE = 277
cs.ARM_INS_VCGT = 278
cs.ARM_INS_VCLE = 279
cs.ARM_INS_VCLS = 280
cs.ARM_INS_VCLT = 281
cs.ARM_INS_VCLZ = 282
cs.ARM_INS_VCMP = 283
cs.ARM_INS_VCMPE = 284
cs.ARM_INS_VCNT = 285
cs.ARM_INS_VCVTA = 286
cs.ARM_INS_VCVTB = 287
cs.ARM_INS_VCVT = 288
cs.ARM_INS_VCVTM = 289
cs.ARM_INS_VCVTN = 290
cs.ARM_INS_VCVTP = 291
cs.ARM_INS_VCVTT = 292
cs.ARM_INS_VDIV = 293
cs.ARM_INS_VDUP = 294
cs.ARM_INS_VEOR = 295
cs.ARM_INS_VEXT = 296
cs.ARM_INS_VFMA = 297
cs.ARM_INS_VFMS = 298
cs.ARM_INS_VFNMA = 299
cs.ARM_INS_VFNMS = 300
cs.ARM_INS_VHADD = 301
cs.ARM_INS_VHSUB = 302
cs.ARM_INS_VLD1 = 303
cs.ARM_INS_VLD2 = 304
cs.ARM_INS_VLD3 = 305
cs.ARM_INS_VLD4 = 306
cs.ARM_INS_VLDMDB = 307
cs.ARM_INS_VLDMIA = 308
cs.ARM_INS_VLDR = 309
cs.ARM_INS_VMAXNM = 310
cs.ARM_INS_VMAX = 311
cs.ARM_INS_VMINNM = 312
cs.ARM_INS_VMIN = 313
cs.ARM_INS_VMLA = 314
cs.ARM_INS_VMLAL = 315
cs.ARM_INS_VMLS = 316
cs.ARM_INS_VMLSL = 317
cs.ARM_INS_VMOVL = 318
cs.ARM_INS_VMOVN = 319
cs.ARM_INS_VMSR = 320
cs.ARM_INS_VMUL = 321
cs.ARM_INS_VMULL = 322
cs.ARM_INS_VMVN = 323
cs.ARM_INS_VNEG = 324
cs.ARM_INS_VNMLA = 325
cs.ARM_INS_VNMLS = 326
cs.ARM_INS_VNMUL = 327
cs.ARM_INS_VORN = 328
cs.ARM_INS_VORR = 329
cs.ARM_INS_VPADAL = 330
cs.ARM_INS_VPADDL = 331
cs.ARM_INS_VPADD = 332
cs.ARM_INS_VPMAX = 333
cs.ARM_INS_VPMIN = 334
cs.ARM_INS_VQABS = 335
cs.ARM_INS_VQADD = 336
cs.ARM_INS_VQDMLAL = 337
cs.ARM_INS_VQDMLSL = 338
cs.ARM_INS_VQDMULH = 339
cs.ARM_INS_VQDMULL = 340
cs.ARM_INS_VQMOVUN = 341
cs.ARM_INS_VQMOVN = 342
cs.ARM_INS_VQNEG = 343
cs.ARM_INS_VQRDMULH = 344
cs.ARM_INS_VQRSHL = 345
cs.ARM_INS_VQRSHRN = 346
cs.ARM_INS_VQRSHRUN = 347
cs.ARM_INS_VQSHL = 348
cs.ARM_INS_VQSHLU = 349
cs.ARM_INS_VQSHRN = 350
cs.ARM_INS_VQSHRUN = 351
cs.ARM_INS_VQSUB = 352
cs.ARM_INS_VRADDHN = 353
cs.ARM_INS_VRECPE = 354
cs.ARM_INS_VRECPS = 355
cs.ARM_INS_VREV16 = 356
cs.ARM_INS_VREV32 = 357
cs.ARM_INS_VREV64 = 358
cs.ARM_INS_VRHADD = 359
cs.ARM_INS_VRINTA = 360
cs.ARM_INS_VRINTM = 361
cs.ARM_INS_VRINTN = 362
cs.ARM_INS_VRINTP = 363
cs.ARM_INS_VRINTR = 364
cs.ARM_INS_VRINTX = 365
cs.ARM_INS_VRINTZ = 366
cs.ARM_INS_VRSHL = 367
cs.ARM_INS_VRSHRN = 368
cs.ARM_INS_VRSHR = 369
cs.ARM_INS_VRSQRTE = 370
cs.ARM_INS_VRSQRTS = 371
cs.ARM_INS_VRSRA = 372
cs.ARM_INS_VRSUBHN = 373
cs.ARM_INS_VSELEQ = 374
cs.ARM_INS_VSELGE = 375
cs.ARM_INS_VSELGT = 376
cs.ARM_INS_VSELVS = 377
cs.ARM_INS_VSHLL = 378
cs.ARM_INS_VSHL = 379
cs.ARM_INS_VSHRN = 380
cs.ARM_INS_VSHR = 381
cs.ARM_INS_VSLI = 382
cs.ARM_INS_VSQRT = 383
cs.ARM_INS_VSRA = 384
cs.ARM_INS_VSRI = 385
cs.ARM_INS_VST1 = 386
cs.ARM_INS_VST2 = 387
cs.ARM_INS_VST3 = 388
cs.ARM_INS_VST4 = 389
cs.ARM_INS_VSTMDB = 390
cs.ARM_INS_VSTMIA = 391
cs.ARM_INS_VSTR = 392
cs.ARM_INS_VSUB = 393
cs.ARM_INS_VSUBHN = 394
cs.ARM_INS_VSUBL = 395
cs.ARM_INS_VSUBW = 396
cs.ARM_INS_VSWP = 397
cs.ARM_INS_VTBL = 398
cs.ARM_INS_VTBX = 399
cs.ARM_INS_VCVTR = 400
cs.ARM_INS_VTRN = 401
cs.ARM_INS_VTST = 402
cs.ARM_INS_VUZP = 403
cs.ARM_INS_VZIP = 404
cs.ARM_INS_ADDW = 405
cs.ARM_INS_ASR = 406
cs.ARM_INS_DCPS1 = 407
cs.ARM_INS_DCPS2 = 408
cs.ARM_INS_DCPS3 = 409
cs.ARM_INS_IT = 410
cs.ARM_INS_LSL = 411
cs.ARM_INS_LSR = 412
cs.ARM_INS_ASRS = 413
cs.ARM_INS_LSRS = 414
cs.ARM_INS_ORN = 415
cs.ARM_INS_ROR = 416
cs.ARM_INS_RRX = 417
cs.ARM_INS_SUBS = 418
cs.ARM_INS_SUBW = 419
cs.ARM_INS_TBB = 420
cs.ARM_INS_TBH = 421
cs.ARM_INS_CBNZ = 422
cs.ARM_INS_CBZ = 423
cs.ARM_INS_MOVS = 424
cs.ARM_INS_POP = 425
cs.ARM_INS_PUSH = 426
cs.ARM_INS_NOP = 427
cs.ARM_INS_YIELD = 428
cs.ARM_INS_WFE = 429
cs.ARM_INS_WFI = 430
cs.ARM_INS_SEV = 431
cs.ARM_INS_SEVL = 432
cs.ARM_INS_VPUSH = 433
cs.ARM_INS_VPOP = 434
cs.ARM_INS_ENDING = 435
// Group of ARM instructions
cs.ARM_GRP_INVALID = 0
// Generic groups
cs.ARM_GRP_JUMP = 1
// Architecture-specific groups
cs.ARM_GRP_CRYPTO = 128
cs.ARM_GRP_DATABARRIER = 129
cs.ARM_GRP_DIVIDE = 130
cs.ARM_GRP_FPARMV8 = 131
cs.ARM_GRP_MULTPRO = 132
cs.ARM_GRP_NEON = 133
cs.ARM_GRP_T2EXTRACTPACK = 134
cs.ARM_GRP_THUMB2DSP = 135
cs.ARM_GRP_TRUSTZONE = 136
cs.ARM_GRP_V4T = 137
cs.ARM_GRP_V5T = 138
cs.ARM_GRP_V5TE = 139
cs.ARM_GRP_V6 = 140
cs.ARM_GRP_V6T2 = 141
cs.ARM_GRP_V7 = 142
cs.ARM_GRP_V8 = 143
cs.ARM_GRP_VFP2 = 144
cs.ARM_GRP_VFP3 = 145
cs.ARM_GRP_VFP4 = 146
cs.ARM_GRP_ARM = 147
cs.ARM_GRP_MCLASS = 148
cs.ARM_GRP_NOTMCLASS = 149
cs.ARM_GRP_THUMB = 150
cs.ARM_GRP_THUMB1ONLY = 151
cs.ARM_GRP_THUMB2 = 152
cs.ARM_GRP_PREV8 = 153
cs.ARM_GRP_FPVMLX = 154
cs.ARM_GRP_MULOPS = 155
cs.ARM_GRP_CRC = 156
cs.ARM_GRP_DPVFP = 157
cs.ARM_GRP_V6M = 158
cs.ARM_GRP_ENDING = 159
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [mips_const.py]
// Operand type for instruction's operands
cs.MIPS_OP_INVALID = 0
cs.MIPS_OP_REG = 1
cs.MIPS_OP_IMM = 2
cs.MIPS_OP_MEM = 3
// MIPS registers
cs.MIPS_REG_INVALID = 0
// General purpose registers
cs.MIPS_REG_0 = 1
cs.MIPS_REG_1 = 2
cs.MIPS_REG_2 = 3
cs.MIPS_REG_3 = 4
cs.MIPS_REG_4 = 5
cs.MIPS_REG_5 = 6
cs.MIPS_REG_6 = 7
cs.MIPS_REG_7 = 8
cs.MIPS_REG_8 = 9
cs.MIPS_REG_9 = 10
cs.MIPS_REG_10 = 11
cs.MIPS_REG_11 = 12
cs.MIPS_REG_12 = 13
cs.MIPS_REG_13 = 14
cs.MIPS_REG_14 = 15
cs.MIPS_REG_15 = 16
cs.MIPS_REG_16 = 17
cs.MIPS_REG_17 = 18
cs.MIPS_REG_18 = 19
cs.MIPS_REG_19 = 20
cs.MIPS_REG_20 = 21
cs.MIPS_REG_21 = 22
cs.MIPS_REG_22 = 23
cs.MIPS_REG_23 = 24
cs.MIPS_REG_24 = 25
cs.MIPS_REG_25 = 26
cs.MIPS_REG_26 = 27
cs.MIPS_REG_27 = 28
cs.MIPS_REG_28 = 29
cs.MIPS_REG_29 = 30
cs.MIPS_REG_30 = 31
cs.MIPS_REG_31 = 32
// DSP registers
cs.MIPS_REG_DSPCCOND = 33
cs.MIPS_REG_DSPCARRY = 34
cs.MIPS_REG_DSPEFI = 35
cs.MIPS_REG_DSPOUTFLAG = 36
cs.MIPS_REG_DSPOUTFLAG16_19 = 37
cs.MIPS_REG_DSPOUTFLAG20 = 38
cs.MIPS_REG_DSPOUTFLAG21 = 39
cs.MIPS_REG_DSPOUTFLAG22 = 40
cs.MIPS_REG_DSPOUTFLAG23 = 41
cs.MIPS_REG_DSPPOS = 42
cs.MIPS_REG_DSPSCOUNT = 43
// ACC registers
cs.MIPS_REG_AC0 = 44
cs.MIPS_REG_AC1 = 45
cs.MIPS_REG_AC2 = 46
cs.MIPS_REG_AC3 = 47
// COP registers
cs.MIPS_REG_CC0 = 48
cs.MIPS_REG_CC1 = 49
cs.MIPS_REG_CC2 = 50
cs.MIPS_REG_CC3 = 51
cs.MIPS_REG_CC4 = 52
cs.MIPS_REG_CC5 = 53
cs.MIPS_REG_CC6 = 54
cs.MIPS_REG_CC7 = 55
// FPU registers
cs.MIPS_REG_F0 = 56
cs.MIPS_REG_F1 = 57
cs.MIPS_REG_F2 = 58
cs.MIPS_REG_F3 = 59
cs.MIPS_REG_F4 = 60
cs.MIPS_REG_F5 = 61
cs.MIPS_REG_F6 = 62
cs.MIPS_REG_F7 = 63
cs.MIPS_REG_F8 = 64
cs.MIPS_REG_F9 = 65
cs.MIPS_REG_F10 = 66
cs.MIPS_REG_F11 = 67
cs.MIPS_REG_F12 = 68
cs.MIPS_REG_F13 = 69
cs.MIPS_REG_F14 = 70
cs.MIPS_REG_F15 = 71
cs.MIPS_REG_F16 = 72
cs.MIPS_REG_F17 = 73
cs.MIPS_REG_F18 = 74
cs.MIPS_REG_F19 = 75
cs.MIPS_REG_F20 = 76
cs.MIPS_REG_F21 = 77
cs.MIPS_REG_F22 = 78
cs.MIPS_REG_F23 = 79
cs.MIPS_REG_F24 = 80
cs.MIPS_REG_F25 = 81
cs.MIPS_REG_F26 = 82
cs.MIPS_REG_F27 = 83
cs.MIPS_REG_F28 = 84
cs.MIPS_REG_F29 = 85
cs.MIPS_REG_F30 = 86
cs.MIPS_REG_F31 = 87
cs.MIPS_REG_FCC0 = 88
cs.MIPS_REG_FCC1 = 89
cs.MIPS_REG_FCC2 = 90
cs.MIPS_REG_FCC3 = 91
cs.MIPS_REG_FCC4 = 92
cs.MIPS_REG_FCC5 = 93
cs.MIPS_REG_FCC6 = 94
cs.MIPS_REG_FCC7 = 95
// AFPR128
cs.MIPS_REG_W0 = 96
cs.MIPS_REG_W1 = 97
cs.MIPS_REG_W2 = 98
cs.MIPS_REG_W3 = 99
cs.MIPS_REG_W4 = 100
cs.MIPS_REG_W5 = 101
cs.MIPS_REG_W6 = 102
cs.MIPS_REG_W7 = 103
cs.MIPS_REG_W8 = 104
cs.MIPS_REG_W9 = 105
cs.MIPS_REG_W10 = 106
cs.MIPS_REG_W11 = 107
cs.MIPS_REG_W12 = 108
cs.MIPS_REG_W13 = 109
cs.MIPS_REG_W14 = 110
cs.MIPS_REG_W15 = 111
cs.MIPS_REG_W16 = 112
cs.MIPS_REG_W17 = 113
cs.MIPS_REG_W18 = 114
cs.MIPS_REG_W19 = 115
cs.MIPS_REG_W20 = 116
cs.MIPS_REG_W21 = 117
cs.MIPS_REG_W22 = 118
cs.MIPS_REG_W23 = 119
cs.MIPS_REG_W24 = 120
cs.MIPS_REG_W25 = 121
cs.MIPS_REG_W26 = 122
cs.MIPS_REG_W27 = 123
cs.MIPS_REG_W28 = 124
cs.MIPS_REG_W29 = 125
cs.MIPS_REG_W30 = 126
cs.MIPS_REG_W31 = 127
cs.MIPS_REG_HI = 128
cs.MIPS_REG_LO = 129
cs.MIPS_REG_P0 = 130
cs.MIPS_REG_P1 = 131
cs.MIPS_REG_P2 = 132
cs.MIPS_REG_MPL0 = 133
cs.MIPS_REG_MPL1 = 134
cs.MIPS_REG_MPL2 = 135
cs.MIPS_REG_ENDING = 136
// cs.MIPS_REG_ZERO = MIPS_REG_0
// cs.MIPS_REG_AT = MIPS_REG_1
// cs.MIPS_REG_V0 = MIPS_REG_2
// cs.MIPS_REG_V1 = MIPS_REG_3
// cs.MIPS_REG_A0 = MIPS_REG_4
// cs.MIPS_REG_A1 = MIPS_REG_5
// cs.MIPS_REG_A2 = MIPS_REG_6
// cs.MIPS_REG_A3 = MIPS_REG_7
// cs.MIPS_REG_T0 = MIPS_REG_8
// cs.MIPS_REG_T1 = MIPS_REG_9
// cs.MIPS_REG_T2 = MIPS_REG_10
// cs.MIPS_REG_T3 = MIPS_REG_11
// cs.MIPS_REG_T4 = MIPS_REG_12
// cs.MIPS_REG_T5 = MIPS_REG_13
// cs.MIPS_REG_T6 = MIPS_REG_14
// cs.MIPS_REG_T7 = MIPS_REG_15
// cs.MIPS_REG_S0 = MIPS_REG_16
// cs.MIPS_REG_S1 = MIPS_REG_17
// cs.MIPS_REG_S2 = MIPS_REG_18
// cs.MIPS_REG_S3 = MIPS_REG_19
// cs.MIPS_REG_S4 = MIPS_REG_20
// cs.MIPS_REG_S5 = MIPS_REG_21
// cs.MIPS_REG_S6 = MIPS_REG_22
// cs.MIPS_REG_S7 = MIPS_REG_23
// cs.MIPS_REG_T8 = MIPS_REG_24
// cs.MIPS_REG_T9 = MIPS_REG_25
// cs.MIPS_REG_K0 = MIPS_REG_26
// cs.MIPS_REG_K1 = MIPS_REG_27
// cs.MIPS_REG_GP = MIPS_REG_28
// cs.MIPS_REG_SP = MIPS_REG_29
// cs.MIPS_REG_FP = MIPS_REG_30
// cs.MIPS_REG_S8 = MIPS_REG_30
// cs.MIPS_REG_RA = MIPS_REG_31
// cs.MIPS_REG_HI0 = MIPS_REG_AC0
// cs.MIPS_REG_HI1 = MIPS_REG_AC1
// cs.MIPS_REG_HI2 = MIPS_REG_AC2
// cs.MIPS_REG_HI3 = MIPS_REG_AC3
// cs.MIPS_REG_LO0 = MIPS_REG_HI0
// cs.MIPS_REG_LO1 = MIPS_REG_HI1
// cs.MIPS_REG_LO2 = MIPS_REG_HI2
// cs.MIPS_REG_LO3 = MIPS_REG_HI3
// MIPS instruction
cs.MIPS_INS_INVALID = 0
cs.MIPS_INS_ABSQ_S = 1
cs.MIPS_INS_ADD = 2
cs.MIPS_INS_ADDIUPC = 3
cs.MIPS_INS_ADDQH = 4
cs.MIPS_INS_ADDQH_R = 5
cs.MIPS_INS_ADDQ = 6
cs.MIPS_INS_ADDQ_S = 7
cs.MIPS_INS_ADDSC = 8
cs.MIPS_INS_ADDS_A = 9
cs.MIPS_INS_ADDS_S = 10
cs.MIPS_INS_ADDS_U = 11
cs.MIPS_INS_ADDUH = 12
cs.MIPS_INS_ADDUH_R = 13
cs.MIPS_INS_ADDU = 14
cs.MIPS_INS_ADDU_S = 15
cs.MIPS_INS_ADDVI = 16
cs.MIPS_INS_ADDV = 17
cs.MIPS_INS_ADDWC = 18
cs.MIPS_INS_ADD_A = 19
cs.MIPS_INS_ADDI = 20
cs.MIPS_INS_ADDIU = 21
cs.MIPS_INS_ALIGN = 22
cs.MIPS_INS_ALUIPC = 23
cs.MIPS_INS_AND = 24
cs.MIPS_INS_ANDI = 25
cs.MIPS_INS_APPEND = 26
cs.MIPS_INS_ASUB_S = 27
cs.MIPS_INS_ASUB_U = 28
cs.MIPS_INS_AUI = 29
cs.MIPS_INS_AUIPC = 30
cs.MIPS_INS_AVER_S = 31
cs.MIPS_INS_AVER_U = 32
cs.MIPS_INS_AVE_S = 33
cs.MIPS_INS_AVE_U = 34
cs.MIPS_INS_BADDU = 35
cs.MIPS_INS_BAL = 36
cs.MIPS_INS_BALC = 37
cs.MIPS_INS_BALIGN = 38
cs.MIPS_INS_BC = 39
cs.MIPS_INS_BC0F = 40
cs.MIPS_INS_BC0FL = 41
cs.MIPS_INS_BC0T = 42
cs.MIPS_INS_BC0TL = 43
cs.MIPS_INS_BC1EQZ = 44
cs.MIPS_INS_BC1F = 45
cs.MIPS_INS_BC1FL = 46
cs.MIPS_INS_BC1NEZ = 47
cs.MIPS_INS_BC1T = 48
cs.MIPS_INS_BC1TL = 49
cs.MIPS_INS_BC2EQZ = 50
cs.MIPS_INS_BC2F = 51
cs.MIPS_INS_BC2FL = 52
cs.MIPS_INS_BC2NEZ = 53
cs.MIPS_INS_BC2T = 54
cs.MIPS_INS_BC2TL = 55
cs.MIPS_INS_BC3F = 56
cs.MIPS_INS_BC3FL = 57
cs.MIPS_INS_BC3T = 58
cs.MIPS_INS_BC3TL = 59
cs.MIPS_INS_BCLRI = 60
cs.MIPS_INS_BCLR = 61
cs.MIPS_INS_BEQ = 62
cs.MIPS_INS_BEQC = 63
cs.MIPS_INS_BEQL = 64
cs.MIPS_INS_BEQZALC = 65
cs.MIPS_INS_BEQZC = 66
cs.MIPS_INS_BGEC = 67
cs.MIPS_INS_BGEUC = 68
cs.MIPS_INS_BGEZ = 69
cs.MIPS_INS_BGEZAL = 70
cs.MIPS_INS_BGEZALC = 71
cs.MIPS_INS_BGEZALL = 72
cs.MIPS_INS_BGEZALS = 73
cs.MIPS_INS_BGEZC = 74
cs.MIPS_INS_BGEZL = 75
cs.MIPS_INS_BGTZ = 76
cs.MIPS_INS_BGTZALC = 77
cs.MIPS_INS_BGTZC = 78
cs.MIPS_INS_BGTZL = 79
cs.MIPS_INS_BINSLI = 80
cs.MIPS_INS_BINSL = 81
cs.MIPS_INS_BINSRI = 82
cs.MIPS_INS_BINSR = 83
cs.MIPS_INS_BITREV = 84
cs.MIPS_INS_BITSWAP = 85
cs.MIPS_INS_BLEZ = 86
cs.MIPS_INS_BLEZALC = 87
cs.MIPS_INS_BLEZC = 88
cs.MIPS_INS_BLEZL = 89
cs.MIPS_INS_BLTC = 90
cs.MIPS_INS_BLTUC = 91
cs.MIPS_INS_BLTZ = 92
cs.MIPS_INS_BLTZAL = 93
cs.MIPS_INS_BLTZALC = 94
cs.MIPS_INS_BLTZALL = 95
cs.MIPS_INS_BLTZALS = 96
cs.MIPS_INS_BLTZC = 97
cs.MIPS_INS_BLTZL = 98
cs.MIPS_INS_BMNZI = 99
cs.MIPS_INS_BMNZ = 100
cs.MIPS_INS_BMZI = 101
cs.MIPS_INS_BMZ = 102
cs.MIPS_INS_BNE = 103
cs.MIPS_INS_BNEC = 104
cs.MIPS_INS_BNEGI = 105
cs.MIPS_INS_BNEG = 106
cs.MIPS_INS_BNEL = 107
cs.MIPS_INS_BNEZALC = 108
cs.MIPS_INS_BNEZC = 109
cs.MIPS_INS_BNVC = 110
cs.MIPS_INS_BNZ = 111
cs.MIPS_INS_BOVC = 112
cs.MIPS_INS_BPOSGE32 = 113
cs.MIPS_INS_BREAK = 114
cs.MIPS_INS_BSELI = 115
cs.MIPS_INS_BSEL = 116
cs.MIPS_INS_BSETI = 117
cs.MIPS_INS_BSET = 118
cs.MIPS_INS_BZ = 119
cs.MIPS_INS_BEQZ = 120
cs.MIPS_INS_B = 121
cs.MIPS_INS_BNEZ = 122
cs.MIPS_INS_BTEQZ = 123
cs.MIPS_INS_BTNEZ = 124
cs.MIPS_INS_CACHE = 125
cs.MIPS_INS_CEIL = 126
cs.MIPS_INS_CEQI = 127
cs.MIPS_INS_CEQ = 128
cs.MIPS_INS_CFC1 = 129
cs.MIPS_INS_CFCMSA = 130
cs.MIPS_INS_CINS = 131
cs.MIPS_INS_CINS32 = 132
cs.MIPS_INS_CLASS = 133
cs.MIPS_INS_CLEI_S = 134
cs.MIPS_INS_CLEI_U = 135
cs.MIPS_INS_CLE_S = 136
cs.MIPS_INS_CLE_U = 137
cs.MIPS_INS_CLO = 138
cs.MIPS_INS_CLTI_S = 139
cs.MIPS_INS_CLTI_U = 140
cs.MIPS_INS_CLT_S = 141
cs.MIPS_INS_CLT_U = 142
cs.MIPS_INS_CLZ = 143
cs.MIPS_INS_CMPGDU = 144
cs.MIPS_INS_CMPGU = 145
cs.MIPS_INS_CMPU = 146
cs.MIPS_INS_CMP = 147
cs.MIPS_INS_COPY_S = 148
cs.MIPS_INS_COPY_U = 149
cs.MIPS_INS_CTC1 = 150
cs.MIPS_INS_CTCMSA = 151
cs.MIPS_INS_CVT = 152
cs.MIPS_INS_C = 153
cs.MIPS_INS_CMPI = 154
cs.MIPS_INS_DADD = 155
cs.MIPS_INS_DADDI = 156
cs.MIPS_INS_DADDIU = 157
cs.MIPS_INS_DADDU = 158
cs.MIPS_INS_DAHI = 159
cs.MIPS_INS_DALIGN = 160
cs.MIPS_INS_DATI = 161
cs.MIPS_INS_DAUI = 162
cs.MIPS_INS_DBITSWAP = 163
cs.MIPS_INS_DCLO = 164
cs.MIPS_INS_DCLZ = 165
cs.MIPS_INS_DDIV = 166
cs.MIPS_INS_DDIVU = 167
cs.MIPS_INS_DERET = 168
cs.MIPS_INS_DEXT = 169
cs.MIPS_INS_DEXTM = 170
cs.MIPS_INS_DEXTU = 171
cs.MIPS_INS_DI = 172
cs.MIPS_INS_DINS = 173
cs.MIPS_INS_DINSM = 174
cs.MIPS_INS_DINSU = 175
cs.MIPS_INS_DIV = 176
cs.MIPS_INS_DIVU = 177
cs.MIPS_INS_DIV_S = 178
cs.MIPS_INS_DIV_U = 179
cs.MIPS_INS_DLSA = 180
cs.MIPS_INS_DMFC0 = 181
cs.MIPS_INS_DMFC1 = 182
cs.MIPS_INS_DMFC2 = 183
cs.MIPS_INS_DMOD = 184
cs.MIPS_INS_DMODU = 185
cs.MIPS_INS_DMTC0 = 186
cs.MIPS_INS_DMTC1 = 187
cs.MIPS_INS_DMTC2 = 188
cs.MIPS_INS_DMUH = 189
cs.MIPS_INS_DMUHU = 190
cs.MIPS_INS_DMUL = 191
cs.MIPS_INS_DMULT = 192
cs.MIPS_INS_DMULTU = 193
cs.MIPS_INS_DMULU = 194
cs.MIPS_INS_DOTP_S = 195
cs.MIPS_INS_DOTP_U = 196
cs.MIPS_INS_DPADD_S = 197
cs.MIPS_INS_DPADD_U = 198
cs.MIPS_INS_DPAQX_SA = 199
cs.MIPS_INS_DPAQX_S = 200
cs.MIPS_INS_DPAQ_SA = 201
cs.MIPS_INS_DPAQ_S = 202
cs.MIPS_INS_DPAU = 203
cs.MIPS_INS_DPAX = 204
cs.MIPS_INS_DPA = 205
cs.MIPS_INS_DPOP = 206
cs.MIPS_INS_DPSQX_SA = 207
cs.MIPS_INS_DPSQX_S = 208
cs.MIPS_INS_DPSQ_SA = 209
cs.MIPS_INS_DPSQ_S = 210
cs.MIPS_INS_DPSUB_S = 211
cs.MIPS_INS_DPSUB_U = 212
cs.MIPS_INS_DPSU = 213
cs.MIPS_INS_DPSX = 214
cs.MIPS_INS_DPS = 215
cs.MIPS_INS_DROTR = 216
cs.MIPS_INS_DROTR32 = 217
cs.MIPS_INS_DROTRV = 218
cs.MIPS_INS_DSBH = 219
cs.MIPS_INS_DSHD = 220
cs.MIPS_INS_DSLL = 221
cs.MIPS_INS_DSLL32 = 222
cs.MIPS_INS_DSLLV = 223
cs.MIPS_INS_DSRA = 224
cs.MIPS_INS_DSRA32 = 225
cs.MIPS_INS_DSRAV = 226
cs.MIPS_INS_DSRL = 227
cs.MIPS_INS_DSRL32 = 228
cs.MIPS_INS_DSRLV = 229
cs.MIPS_INS_DSUB = 230
cs.MIPS_INS_DSUBU = 231
cs.MIPS_INS_EHB = 232
cs.MIPS_INS_EI = 233
cs.MIPS_INS_ERET = 234
cs.MIPS_INS_EXT = 235
cs.MIPS_INS_EXTP = 236
cs.MIPS_INS_EXTPDP = 237
cs.MIPS_INS_EXTPDPV = 238
cs.MIPS_INS_EXTPV = 239
cs.MIPS_INS_EXTRV_RS = 240
cs.MIPS_INS_EXTRV_R = 241
cs.MIPS_INS_EXTRV_S = 242
cs.MIPS_INS_EXTRV = 243
cs.MIPS_INS_EXTR_RS = 244
cs.MIPS_INS_EXTR_R = 245
cs.MIPS_INS_EXTR_S = 246
cs.MIPS_INS_EXTR = 247
cs.MIPS_INS_EXTS = 248
cs.MIPS_INS_EXTS32 = 249
cs.MIPS_INS_ABS = 250
cs.MIPS_INS_FADD = 251
cs.MIPS_INS_FCAF = 252
cs.MIPS_INS_FCEQ = 253
cs.MIPS_INS_FCLASS = 254
cs.MIPS_INS_FCLE = 255
cs.MIPS_INS_FCLT = 256
cs.MIPS_INS_FCNE = 257
cs.MIPS_INS_FCOR = 258
cs.MIPS_INS_FCUEQ = 259
cs.MIPS_INS_FCULE = 260
cs.MIPS_INS_FCULT = 261
cs.MIPS_INS_FCUNE = 262
cs.MIPS_INS_FCUN = 263
cs.MIPS_INS_FDIV = 264
cs.MIPS_INS_FEXDO = 265
cs.MIPS_INS_FEXP2 = 266
cs.MIPS_INS_FEXUPL = 267
cs.MIPS_INS_FEXUPR = 268
cs.MIPS_INS_FFINT_S = 269
cs.MIPS_INS_FFINT_U = 270
cs.MIPS_INS_FFQL = 271
cs.MIPS_INS_FFQR = 272
cs.MIPS_INS_FILL = 273
cs.MIPS_INS_FLOG2 = 274
cs.MIPS_INS_FLOOR = 275
cs.MIPS_INS_FMADD = 276
cs.MIPS_INS_FMAX_A = 277
cs.MIPS_INS_FMAX = 278
cs.MIPS_INS_FMIN_A = 279
cs.MIPS_INS_FMIN = 280
cs.MIPS_INS_MOV = 281
cs.MIPS_INS_FMSUB = 282
cs.MIPS_INS_FMUL = 283
cs.MIPS_INS_MUL = 284
cs.MIPS_INS_NEG = 285
cs.MIPS_INS_FRCP = 286
cs.MIPS_INS_FRINT = 287
cs.MIPS_INS_FRSQRT = 288
cs.MIPS_INS_FSAF = 289
cs.MIPS_INS_FSEQ = 290
cs.MIPS_INS_FSLE = 291
cs.MIPS_INS_FSLT = 292
cs.MIPS_INS_FSNE = 293
cs.MIPS_INS_FSOR = 294
cs.MIPS_INS_FSQRT = 295
cs.MIPS_INS_SQRT = 296
cs.MIPS_INS_FSUB = 297
cs.MIPS_INS_SUB = 298
cs.MIPS_INS_FSUEQ = 299
cs.MIPS_INS_FSULE = 300
cs.MIPS_INS_FSULT = 301
cs.MIPS_INS_FSUNE = 302
cs.MIPS_INS_FSUN = 303
cs.MIPS_INS_FTINT_S = 304
cs.MIPS_INS_FTINT_U = 305
cs.MIPS_INS_FTQ = 306
cs.MIPS_INS_FTRUNC_S = 307
cs.MIPS_INS_FTRUNC_U = 308
cs.MIPS_INS_HADD_S = 309
cs.MIPS_INS_HADD_U = 310
cs.MIPS_INS_HSUB_S = 311
cs.MIPS_INS_HSUB_U = 312
cs.MIPS_INS_ILVEV = 313
cs.MIPS_INS_ILVL = 314
cs.MIPS_INS_ILVOD = 315
cs.MIPS_INS_ILVR = 316
cs.MIPS_INS_INS = 317
cs.MIPS_INS_INSERT = 318
cs.MIPS_INS_INSV = 319
cs.MIPS_INS_INSVE = 320
cs.MIPS_INS_J = 321
cs.MIPS_INS_JAL = 322
cs.MIPS_INS_JALR = 323
cs.MIPS_INS_JALRS = 324
cs.MIPS_INS_JALS = 325
cs.MIPS_INS_JALX = 326
cs.MIPS_INS_JIALC = 327
cs.MIPS_INS_JIC = 328
cs.MIPS_INS_JR = 329
cs.MIPS_INS_JRADDIUSP = 330
cs.MIPS_INS_JRC = 331
cs.MIPS_INS_JALRC = 332
cs.MIPS_INS_LB = 333
cs.MIPS_INS_LBUX = 334
cs.MIPS_INS_LBU = 335
cs.MIPS_INS_LD = 336
cs.MIPS_INS_LDC1 = 337
cs.MIPS_INS_LDC2 = 338
cs.MIPS_INS_LDC3 = 339
cs.MIPS_INS_LDI = 340
cs.MIPS_INS_LDL = 341
cs.MIPS_INS_LDPC = 342
cs.MIPS_INS_LDR = 343
cs.MIPS_INS_LDXC1 = 344
cs.MIPS_INS_LH = 345
cs.MIPS_INS_LHX = 346
cs.MIPS_INS_LHU = 347
cs.MIPS_INS_LL = 348
cs.MIPS_INS_LLD = 349
cs.MIPS_INS_LSA = 350
cs.MIPS_INS_LUXC1 = 351
cs.MIPS_INS_LUI = 352
cs.MIPS_INS_LW = 353
cs.MIPS_INS_LWC1 = 354
cs.MIPS_INS_LWC2 = 355
cs.MIPS_INS_LWC3 = 356
cs.MIPS_INS_LWL = 357
cs.MIPS_INS_LWPC = 358
cs.MIPS_INS_LWR = 359
cs.MIPS_INS_LWUPC = 360
cs.MIPS_INS_LWU = 361
cs.MIPS_INS_LWX = 362
cs.MIPS_INS_LWXC1 = 363
cs.MIPS_INS_LI = 364
cs.MIPS_INS_MADD = 365
cs.MIPS_INS_MADDF = 366
cs.MIPS_INS_MADDR_Q = 367
cs.MIPS_INS_MADDU = 368
cs.MIPS_INS_MADDV = 369
cs.MIPS_INS_MADD_Q = 370
cs.MIPS_INS_MAQ_SA = 371
cs.MIPS_INS_MAQ_S = 372
cs.MIPS_INS_MAXA = 373
cs.MIPS_INS_MAXI_S = 374
cs.MIPS_INS_MAXI_U = 375
cs.MIPS_INS_MAX_A = 376
cs.MIPS_INS_MAX = 377
cs.MIPS_INS_MAX_S = 378
cs.MIPS_INS_MAX_U = 379
cs.MIPS_INS_MFC0 = 380
cs.MIPS_INS_MFC1 = 381
cs.MIPS_INS_MFC2 = 382
cs.MIPS_INS_MFHC1 = 383
cs.MIPS_INS_MFHI = 384
cs.MIPS_INS_MFLO = 385
cs.MIPS_INS_MINA = 386
cs.MIPS_INS_MINI_S = 387
cs.MIPS_INS_MINI_U = 388
cs.MIPS_INS_MIN_A = 389
cs.MIPS_INS_MIN = 390
cs.MIPS_INS_MIN_S = 391
cs.MIPS_INS_MIN_U = 392
cs.MIPS_INS_MOD = 393
cs.MIPS_INS_MODSUB = 394
cs.MIPS_INS_MODU = 395
cs.MIPS_INS_MOD_S = 396
cs.MIPS_INS_MOD_U = 397
cs.MIPS_INS_MOVE = 398
cs.MIPS_INS_MOVF = 399
cs.MIPS_INS_MOVN = 400
cs.MIPS_INS_MOVT = 401
cs.MIPS_INS_MOVZ = 402
cs.MIPS_INS_MSUB = 403
cs.MIPS_INS_MSUBF = 404
cs.MIPS_INS_MSUBR_Q = 405
cs.MIPS_INS_MSUBU = 406
cs.MIPS_INS_MSUBV = 407
cs.MIPS_INS_MSUB_Q = 408
cs.MIPS_INS_MTC0 = 409
cs.MIPS_INS_MTC1 = 410
cs.MIPS_INS_MTC2 = 411
cs.MIPS_INS_MTHC1 = 412
cs.MIPS_INS_MTHI = 413
cs.MIPS_INS_MTHLIP = 414
cs.MIPS_INS_MTLO = 415
cs.MIPS_INS_MTM0 = 416
cs.MIPS_INS_MTM1 = 417
cs.MIPS_INS_MTM2 = 418
cs.MIPS_INS_MTP0 = 419
cs.MIPS_INS_MTP1 = 420
cs.MIPS_INS_MTP2 = 421
cs.MIPS_INS_MUH = 422
cs.MIPS_INS_MUHU = 423
cs.MIPS_INS_MULEQ_S = 424
cs.MIPS_INS_MULEU_S = 425
cs.MIPS_INS_MULQ_RS = 426
cs.MIPS_INS_MULQ_S = 427
cs.MIPS_INS_MULR_Q = 428
cs.MIPS_INS_MULSAQ_S = 429
cs.MIPS_INS_MULSA = 430
cs.MIPS_INS_MULT = 431
cs.MIPS_INS_MULTU = 432
cs.MIPS_INS_MULU = 433
cs.MIPS_INS_MULV = 434
cs.MIPS_INS_MUL_Q = 435
cs.MIPS_INS_MUL_S = 436
cs.MIPS_INS_NLOC = 437
cs.MIPS_INS_NLZC = 438
cs.MIPS_INS_NMADD = 439
cs.MIPS_INS_NMSUB = 440
cs.MIPS_INS_NOR = 441
cs.MIPS_INS_NORI = 442
cs.MIPS_INS_NOT = 443
cs.MIPS_INS_OR = 444
cs.MIPS_INS_ORI = 445
cs.MIPS_INS_PACKRL = 446
cs.MIPS_INS_PAUSE = 447
cs.MIPS_INS_PCKEV = 448
cs.MIPS_INS_PCKOD = 449
cs.MIPS_INS_PCNT = 450
cs.MIPS_INS_PICK = 451
cs.MIPS_INS_POP = 452
cs.MIPS_INS_PRECEQU = 453
cs.MIPS_INS_PRECEQ = 454
cs.MIPS_INS_PRECEU = 455
cs.MIPS_INS_PRECRQU_S = 456
cs.MIPS_INS_PRECRQ = 457
cs.MIPS_INS_PRECRQ_RS = 458
cs.MIPS_INS_PRECR = 459
cs.MIPS_INS_PRECR_SRA = 460
cs.MIPS_INS_PRECR_SRA_R = 461
cs.MIPS_INS_PREF = 462
cs.MIPS_INS_PREPEND = 463
cs.MIPS_INS_RADDU = 464
cs.MIPS_INS_RDDSP = 465
cs.MIPS_INS_RDHWR = 466
cs.MIPS_INS_REPLV = 467
cs.MIPS_INS_REPL = 468
cs.MIPS_INS_RINT = 469
cs.MIPS_INS_ROTR = 470
cs.MIPS_INS_ROTRV = 471
cs.MIPS_INS_ROUND = 472
cs.MIPS_INS_SAT_S = 473
cs.MIPS_INS_SAT_U = 474
cs.MIPS_INS_SB = 475
cs.MIPS_INS_SC = 476
cs.MIPS_INS_SCD = 477
cs.MIPS_INS_SD = 478
cs.MIPS_INS_SDBBP = 479
cs.MIPS_INS_SDC1 = 480
cs.MIPS_INS_SDC2 = 481
cs.MIPS_INS_SDC3 = 482
cs.MIPS_INS_SDL = 483
cs.MIPS_INS_SDR = 484
cs.MIPS_INS_SDXC1 = 485
cs.MIPS_INS_SEB = 486
cs.MIPS_INS_SEH = 487
cs.MIPS_INS_SELEQZ = 488
cs.MIPS_INS_SELNEZ = 489
cs.MIPS_INS_SEL = 490
cs.MIPS_INS_SEQ = 491
cs.MIPS_INS_SEQI = 492
cs.MIPS_INS_SH = 493
cs.MIPS_INS_SHF = 494
cs.MIPS_INS_SHILO = 495
cs.MIPS_INS_SHILOV = 496
cs.MIPS_INS_SHLLV = 497
cs.MIPS_INS_SHLLV_S = 498
cs.MIPS_INS_SHLL = 499
cs.MIPS_INS_SHLL_S = 500
cs.MIPS_INS_SHRAV = 501
cs.MIPS_INS_SHRAV_R = 502
cs.MIPS_INS_SHRA = 503
cs.MIPS_INS_SHRA_R = 504
cs.MIPS_INS_SHRLV = 505
cs.MIPS_INS_SHRL = 506
cs.MIPS_INS_SLDI = 507
cs.MIPS_INS_SLD = 508
cs.MIPS_INS_SLL = 509
cs.MIPS_INS_SLLI = 510
cs.MIPS_INS_SLLV = 511
cs.MIPS_INS_SLT = 512
cs.MIPS_INS_SLTI = 513
cs.MIPS_INS_SLTIU = 514
cs.MIPS_INS_SLTU = 515
cs.MIPS_INS_SNE = 516
cs.MIPS_INS_SNEI = 517
cs.MIPS_INS_SPLATI = 518
cs.MIPS_INS_SPLAT = 519
cs.MIPS_INS_SRA = 520
cs.MIPS_INS_SRAI = 521
cs.MIPS_INS_SRARI = 522
cs.MIPS_INS_SRAR = 523
cs.MIPS_INS_SRAV = 524
cs.MIPS_INS_SRL = 525
cs.MIPS_INS_SRLI = 526
cs.MIPS_INS_SRLRI = 527
cs.MIPS_INS_SRLR = 528
cs.MIPS_INS_SRLV = 529
cs.MIPS_INS_SSNOP = 530
cs.MIPS_INS_ST = 531
cs.MIPS_INS_SUBQH = 532
cs.MIPS_INS_SUBQH_R = 533
cs.MIPS_INS_SUBQ = 534
cs.MIPS_INS_SUBQ_S = 535
cs.MIPS_INS_SUBSUS_U = 536
cs.MIPS_INS_SUBSUU_S = 537
cs.MIPS_INS_SUBS_S = 538
cs.MIPS_INS_SUBS_U = 539
cs.MIPS_INS_SUBUH = 540
cs.MIPS_INS_SUBUH_R = 541
cs.MIPS_INS_SUBU = 542
cs.MIPS_INS_SUBU_S = 543
cs.MIPS_INS_SUBVI = 544
cs.MIPS_INS_SUBV = 545
cs.MIPS_INS_SUXC1 = 546
cs.MIPS_INS_SW = 547
cs.MIPS_INS_SWC1 = 548
cs.MIPS_INS_SWC2 = 549
cs.MIPS_INS_SWC3 = 550
cs.MIPS_INS_SWL = 551
cs.MIPS_INS_SWR = 552
cs.MIPS_INS_SWXC1 = 553
cs.MIPS_INS_SYNC = 554
cs.MIPS_INS_SYSCALL = 555
cs.MIPS_INS_TEQ = 556
cs.MIPS_INS_TEQI = 557
cs.MIPS_INS_TGE = 558
cs.MIPS_INS_TGEI = 559
cs.MIPS_INS_TGEIU = 560
cs.MIPS_INS_TGEU = 561
cs.MIPS_INS_TLBP = 562
cs.MIPS_INS_TLBR = 563
cs.MIPS_INS_TLBWI = 564
cs.MIPS_INS_TLBWR = 565
cs.MIPS_INS_TLT = 566
cs.MIPS_INS_TLTI = 567
cs.MIPS_INS_TLTIU = 568
cs.MIPS_INS_TLTU = 569
cs.MIPS_INS_TNE = 570
cs.MIPS_INS_TNEI = 571
cs.MIPS_INS_TRUNC = 572
cs.MIPS_INS_V3MULU = 573
cs.MIPS_INS_VMM0 = 574
cs.MIPS_INS_VMULU = 575
cs.MIPS_INS_VSHF = 576
cs.MIPS_INS_WAIT = 577
cs.MIPS_INS_WRDSP = 578
cs.MIPS_INS_WSBH = 579
cs.MIPS_INS_XOR = 580
cs.MIPS_INS_XORI = 581
// some alias instructions
cs.MIPS_INS_NOP = 582
cs.MIPS_INS_NEGU = 583
// special instructions
cs.MIPS_INS_JALR_HB = 584
cs.MIPS_INS_JR_HB = 585
cs.MIPS_INS_ENDING = 586
// Group of MIPS instructions
cs.MIPS_GRP_INVALID = 0
// Generic groups
cs.MIPS_GRP_JUMP = 1
// Architecture-specific groups
cs.MIPS_GRP_BITCOUNT = 128
cs.MIPS_GRP_DSP = 129
cs.MIPS_GRP_DSPR2 = 130
cs.MIPS_GRP_FPIDX = 131
cs.MIPS_GRP_MSA = 132
cs.MIPS_GRP_MIPS32R2 = 133
cs.MIPS_GRP_MIPS64 = 134
cs.MIPS_GRP_MIPS64R2 = 135
cs.MIPS_GRP_SEINREG = 136
cs.MIPS_GRP_STDENC = 137
cs.MIPS_GRP_SWAP = 138
cs.MIPS_GRP_MICROMIPS = 139
cs.MIPS_GRP_MIPS16MODE = 140
cs.MIPS_GRP_FP64BIT = 141
cs.MIPS_GRP_NONANSFPMATH = 142
cs.MIPS_GRP_NOTFP64BIT = 143
cs.MIPS_GRP_NOTINMICROMIPS = 144
cs.MIPS_GRP_NOTNACL = 145
cs.MIPS_GRP_NOTMIPS32R6 = 146
cs.MIPS_GRP_NOTMIPS64R6 = 147
cs.MIPS_GRP_CNMIPS = 148
cs.MIPS_GRP_MIPS32 = 149
cs.MIPS_GRP_MIPS32R6 = 150
cs.MIPS_GRP_MIPS64R6 = 151
cs.MIPS_GRP_MIPS2 = 152
cs.MIPS_GRP_MIPS3 = 153
cs.MIPS_GRP_MIPS3_32 = 154
cs.MIPS_GRP_MIPS3_32R2 = 155
cs.MIPS_GRP_MIPS4_32 = 156
cs.MIPS_GRP_MIPS4_32R2 = 157
cs.MIPS_GRP_MIPS5_32R2 = 158
cs.MIPS_GRP_GP32BIT = 159
cs.MIPS_GRP_GP64BIT = 160
cs.MIPS_GRP_ENDING = 161
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [ppc_const.py]
// PPC branch codes for some branch instructions
cs.PPC_BC_INVALID = 0
cs.PPC_BC_LT = (0<<5)|12
cs.PPC_BC_LE = (1<<5)|4
cs.PPC_BC_EQ = (2<<5)|12
cs.PPC_BC_GE = (0<<5)|4
cs.PPC_BC_GT = (1<<5)|12
cs.PPC_BC_NE = (2<<5)|4
cs.PPC_BC_UN = (3<<5)|12
cs.PPC_BC_NU = (3<<5)|4
cs.PPC_BC_SO = (4<<5)|12
cs.PPC_BC_NS = (4<<5)|4
// PPC branch hint for some branch instructions
cs.PPC_BH_INVALID = 0
cs.PPC_BH_PLUS = 1
cs.PPC_BH_MINUS = 2
// Operand type for instruction's operands
cs.PPC_OP_INVALID = 0
cs.PPC_OP_REG = 1
cs.PPC_OP_IMM = 2
cs.PPC_OP_MEM = 3
cs.PPC_OP_CRX = 64
// PPC registers
cs.PPC_REG_INVALID = 0
cs.PPC_REG_CARRY = 1
cs.PPC_REG_CC = 2
cs.PPC_REG_CR0 = 3
cs.PPC_REG_CR1 = 4
cs.PPC_REG_CR2 = 5
cs.PPC_REG_CR3 = 6
cs.PPC_REG_CR4 = 7
cs.PPC_REG_CR5 = 8
cs.PPC_REG_CR6 = 9
cs.PPC_REG_CR7 = 10
cs.PPC_REG_CTR = 11
cs.PPC_REG_F0 = 12
cs.PPC_REG_F1 = 13
cs.PPC_REG_F2 = 14
cs.PPC_REG_F3 = 15
cs.PPC_REG_F4 = 16
cs.PPC_REG_F5 = 17
cs.PPC_REG_F6 = 18
cs.PPC_REG_F7 = 19
cs.PPC_REG_F8 = 20
cs.PPC_REG_F9 = 21
cs.PPC_REG_F10 = 22
cs.PPC_REG_F11 = 23
cs.PPC_REG_F12 = 24
cs.PPC_REG_F13 = 25
cs.PPC_REG_F14 = 26
cs.PPC_REG_F15 = 27
cs.PPC_REG_F16 = 28
cs.PPC_REG_F17 = 29
cs.PPC_REG_F18 = 30
cs.PPC_REG_F19 = 31
cs.PPC_REG_F20 = 32
cs.PPC_REG_F21 = 33
cs.PPC_REG_F22 = 34
cs.PPC_REG_F23 = 35
cs.PPC_REG_F24 = 36
cs.PPC_REG_F25 = 37
cs.PPC_REG_F26 = 38
cs.PPC_REG_F27 = 39
cs.PPC_REG_F28 = 40
cs.PPC_REG_F29 = 41
cs.PPC_REG_F30 = 42
cs.PPC_REG_F31 = 43
cs.PPC_REG_LR = 44
cs.PPC_REG_R0 = 45
cs.PPC_REG_R1 = 46
cs.PPC_REG_R2 = 47
cs.PPC_REG_R3 = 48
cs.PPC_REG_R4 = 49
cs.PPC_REG_R5 = 50
cs.PPC_REG_R6 = 51
cs.PPC_REG_R7 = 52
cs.PPC_REG_R8 = 53
cs.PPC_REG_R9 = 54
cs.PPC_REG_R10 = 55
cs.PPC_REG_R11 = 56
cs.PPC_REG_R12 = 57
cs.PPC_REG_R13 = 58
cs.PPC_REG_R14 = 59
cs.PPC_REG_R15 = 60
cs.PPC_REG_R16 = 61
cs.PPC_REG_R17 = 62
cs.PPC_REG_R18 = 63
cs.PPC_REG_R19 = 64
cs.PPC_REG_R20 = 65
cs.PPC_REG_R21 = 66
cs.PPC_REG_R22 = 67
cs.PPC_REG_R23 = 68
cs.PPC_REG_R24 = 69
cs.PPC_REG_R25 = 70
cs.PPC_REG_R26 = 71
cs.PPC_REG_R27 = 72
cs.PPC_REG_R28 = 73
cs.PPC_REG_R29 = 74
cs.PPC_REG_R30 = 75
cs.PPC_REG_R31 = 76
cs.PPC_REG_V0 = 77
cs.PPC_REG_V1 = 78
cs.PPC_REG_V2 = 79
cs.PPC_REG_V3 = 80
cs.PPC_REG_V4 = 81
cs.PPC_REG_V5 = 82
cs.PPC_REG_V6 = 83
cs.PPC_REG_V7 = 84
cs.PPC_REG_V8 = 85
cs.PPC_REG_V9 = 86
cs.PPC_REG_V10 = 87
cs.PPC_REG_V11 = 88
cs.PPC_REG_V12 = 89
cs.PPC_REG_V13 = 90
cs.PPC_REG_V14 = 91
cs.PPC_REG_V15 = 92
cs.PPC_REG_V16 = 93
cs.PPC_REG_V17 = 94
cs.PPC_REG_V18 = 95
cs.PPC_REG_V19 = 96
cs.PPC_REG_V20 = 97
cs.PPC_REG_V21 = 98
cs.PPC_REG_V22 = 99
cs.PPC_REG_V23 = 100
cs.PPC_REG_V24 = 101
cs.PPC_REG_V25 = 102
cs.PPC_REG_V26 = 103
cs.PPC_REG_V27 = 104
cs.PPC_REG_V28 = 105
cs.PPC_REG_V29 = 106
cs.PPC_REG_V30 = 107
cs.PPC_REG_V31 = 108
cs.PPC_REG_VRSAVE = 109
cs.PPC_REG_VS0 = 110
cs.PPC_REG_VS1 = 111
cs.PPC_REG_VS2 = 112
cs.PPC_REG_VS3 = 113
cs.PPC_REG_VS4 = 114
cs.PPC_REG_VS5 = 115
cs.PPC_REG_VS6 = 116
cs.PPC_REG_VS7 = 117
cs.PPC_REG_VS8 = 118
cs.PPC_REG_VS9 = 119
cs.PPC_REG_VS10 = 120
cs.PPC_REG_VS11 = 121
cs.PPC_REG_VS12 = 122
cs.PPC_REG_VS13 = 123
cs.PPC_REG_VS14 = 124
cs.PPC_REG_VS15 = 125
cs.PPC_REG_VS16 = 126
cs.PPC_REG_VS17 = 127
cs.PPC_REG_VS18 = 128
cs.PPC_REG_VS19 = 129
cs.PPC_REG_VS20 = 130
cs.PPC_REG_VS21 = 131
cs.PPC_REG_VS22 = 132
cs.PPC_REG_VS23 = 133
cs.PPC_REG_VS24 = 134
cs.PPC_REG_VS25 = 135
cs.PPC_REG_VS26 = 136
cs.PPC_REG_VS27 = 137
cs.PPC_REG_VS28 = 138
cs.PPC_REG_VS29 = 139
cs.PPC_REG_VS30 = 140
cs.PPC_REG_VS31 = 141
cs.PPC_REG_VS32 = 142
cs.PPC_REG_VS33 = 143
cs.PPC_REG_VS34 = 144
cs.PPC_REG_VS35 = 145
cs.PPC_REG_VS36 = 146
cs.PPC_REG_VS37 = 147
cs.PPC_REG_VS38 = 148
cs.PPC_REG_VS39 = 149
cs.PPC_REG_VS40 = 150
cs.PPC_REG_VS41 = 151
cs.PPC_REG_VS42 = 152
cs.PPC_REG_VS43 = 153
cs.PPC_REG_VS44 = 154
cs.PPC_REG_VS45 = 155
cs.PPC_REG_VS46 = 156
cs.PPC_REG_VS47 = 157
cs.PPC_REG_VS48 = 158
cs.PPC_REG_VS49 = 159
cs.PPC_REG_VS50 = 160
cs.PPC_REG_VS51 = 161
cs.PPC_REG_VS52 = 162
cs.PPC_REG_VS53 = 163
cs.PPC_REG_VS54 = 164
cs.PPC_REG_VS55 = 165
cs.PPC_REG_VS56 = 166
cs.PPC_REG_VS57 = 167
cs.PPC_REG_VS58 = 168
cs.PPC_REG_VS59 = 169
cs.PPC_REG_VS60 = 170
cs.PPC_REG_VS61 = 171
cs.PPC_REG_VS62 = 172
cs.PPC_REG_VS63 = 173
cs.PPC_REG_RM = 174
cs.PPC_REG_CTR8 = 175
cs.PPC_REG_LR8 = 176
cs.PPC_REG_CR1EQ = 177
cs.PPC_REG_ENDING = 178
// PPC instruction
cs.PPC_INS_INVALID = 0
cs.PPC_INS_ADD = 1
cs.PPC_INS_ADDC = 2
cs.PPC_INS_ADDE = 3
cs.PPC_INS_ADDI = 4
cs.PPC_INS_ADDIC = 5
cs.PPC_INS_ADDIS = 6
cs.PPC_INS_ADDME = 7
cs.PPC_INS_ADDZE = 8
cs.PPC_INS_AND = 9
cs.PPC_INS_ANDC = 10
cs.PPC_INS_ANDIS = 11
cs.PPC_INS_ANDI = 12
cs.PPC_INS_B = 13
cs.PPC_INS_BA = 14
cs.PPC_INS_BC = 15
cs.PPC_INS_BCCTR = 16
cs.PPC_INS_BCCTRL = 17
cs.PPC_INS_BCL = 18
cs.PPC_INS_BCLR = 19
cs.PPC_INS_BCLRL = 20
cs.PPC_INS_BCTR = 21
cs.PPC_INS_BCTRL = 22
cs.PPC_INS_BDNZ = 23
cs.PPC_INS_BDNZA = 24
cs.PPC_INS_BDNZL = 25
cs.PPC_INS_BDNZLA = 26
cs.PPC_INS_BDNZLR = 27
cs.PPC_INS_BDNZLRL = 28
cs.PPC_INS_BDZ = 29
cs.PPC_INS_BDZA = 30
cs.PPC_INS_BDZL = 31
cs.PPC_INS_BDZLA = 32
cs.PPC_INS_BDZLR = 33
cs.PPC_INS_BDZLRL = 34
cs.PPC_INS_BL = 35
cs.PPC_INS_BLA = 36
cs.PPC_INS_BLR = 37
cs.PPC_INS_BLRL = 38
cs.PPC_INS_BRINC = 39
cs.PPC_INS_CMPD = 40
cs.PPC_INS_CMPDI = 41
cs.PPC_INS_CMPLD = 42
cs.PPC_INS_CMPLDI = 43
cs.PPC_INS_CMPLW = 44
cs.PPC_INS_CMPLWI = 45
cs.PPC_INS_CMPW = 46
cs.PPC_INS_CMPWI = 47
cs.PPC_INS_CNTLZD = 48
cs.PPC_INS_CNTLZW = 49
cs.PPC_INS_CREQV = 50
cs.PPC_INS_CRXOR = 51
cs.PPC_INS_CRAND = 52
cs.PPC_INS_CRANDC = 53
cs.PPC_INS_CRNAND = 54
cs.PPC_INS_CRNOR = 55
cs.PPC_INS_CROR = 56
cs.PPC_INS_CRORC = 57
cs.PPC_INS_DCBA = 58
cs.PPC_INS_DCBF = 59
cs.PPC_INS_DCBI = 60
cs.PPC_INS_DCBST = 61
cs.PPC_INS_DCBT = 62
cs.PPC_INS_DCBTST = 63
cs.PPC_INS_DCBZ = 64
cs.PPC_INS_DCBZL = 65
cs.PPC_INS_DCCCI = 66
cs.PPC_INS_DIVD = 67
cs.PPC_INS_DIVDU = 68
cs.PPC_INS_DIVW = 69
cs.PPC_INS_DIVWU = 70
cs.PPC_INS_DSS = 71
cs.PPC_INS_DSSALL = 72
cs.PPC_INS_DST = 73
cs.PPC_INS_DSTST = 74
cs.PPC_INS_DSTSTT = 75
cs.PPC_INS_DSTT = 76
cs.PPC_INS_EIEIO = 77
cs.PPC_INS_EQV = 78
cs.PPC_INS_EVABS = 79
cs.PPC_INS_EVADDIW = 80
cs.PPC_INS_EVADDSMIAAW = 81
cs.PPC_INS_EVADDSSIAAW = 82
cs.PPC_INS_EVADDUMIAAW = 83
cs.PPC_INS_EVADDUSIAAW = 84
cs.PPC_INS_EVADDW = 85
cs.PPC_INS_EVAND = 86
cs.PPC_INS_EVANDC = 87
cs.PPC_INS_EVCMPEQ = 88
cs.PPC_INS_EVCMPGTS = 89
cs.PPC_INS_EVCMPGTU = 90
cs.PPC_INS_EVCMPLTS = 91
cs.PPC_INS_EVCMPLTU = 92
cs.PPC_INS_EVCNTLSW = 93
cs.PPC_INS_EVCNTLZW = 94
cs.PPC_INS_EVDIVWS = 95
cs.PPC_INS_EVDIVWU = 96
cs.PPC_INS_EVEQV = 97
cs.PPC_INS_EVEXTSB = 98
cs.PPC_INS_EVEXTSH = 99
cs.PPC_INS_EVLDD = 100
cs.PPC_INS_EVLDDX = 101
cs.PPC_INS_EVLDH = 102
cs.PPC_INS_EVLDHX = 103
cs.PPC_INS_EVLDW = 104
cs.PPC_INS_EVLDWX = 105
cs.PPC_INS_EVLHHESPLAT = 106
cs.PPC_INS_EVLHHESPLATX = 107
cs.PPC_INS_EVLHHOSSPLAT = 108
cs.PPC_INS_EVLHHOSSPLATX = 109
cs.PPC_INS_EVLHHOUSPLAT = 110
cs.PPC_INS_EVLHHOUSPLATX = 111
cs.PPC_INS_EVLWHE = 112
cs.PPC_INS_EVLWHEX = 113
cs.PPC_INS_EVLWHOS = 114
cs.PPC_INS_EVLWHOSX = 115
cs.PPC_INS_EVLWHOU = 116
cs.PPC_INS_EVLWHOUX = 117
cs.PPC_INS_EVLWHSPLAT = 118
cs.PPC_INS_EVLWHSPLATX = 119
cs.PPC_INS_EVLWWSPLAT = 120
cs.PPC_INS_EVLWWSPLATX = 121
cs.PPC_INS_EVMERGEHI = 122
cs.PPC_INS_EVMERGEHILO = 123
cs.PPC_INS_EVMERGELO = 124
cs.PPC_INS_EVMERGELOHI = 125
cs.PPC_INS_EVMHEGSMFAA = 126
cs.PPC_INS_EVMHEGSMFAN = 127
cs.PPC_INS_EVMHEGSMIAA = 128
cs.PPC_INS_EVMHEGSMIAN = 129
cs.PPC_INS_EVMHEGUMIAA = 130
cs.PPC_INS_EVMHEGUMIAN = 131
cs.PPC_INS_EVMHESMF = 132
cs.PPC_INS_EVMHESMFA = 133
cs.PPC_INS_EVMHESMFAAW = 134
cs.PPC_INS_EVMHESMFANW = 135
cs.PPC_INS_EVMHESMI = 136
cs.PPC_INS_EVMHESMIA = 137
cs.PPC_INS_EVMHESMIAAW = 138
cs.PPC_INS_EVMHESMIANW = 139
cs.PPC_INS_EVMHESSF = 140
cs.PPC_INS_EVMHESSFA = 141
cs.PPC_INS_EVMHESSFAAW = 142
cs.PPC_INS_EVMHESSFANW = 143
cs.PPC_INS_EVMHESSIAAW = 144
cs.PPC_INS_EVMHESSIANW = 145
cs.PPC_INS_EVMHEUMI = 146
cs.PPC_INS_EVMHEUMIA = 147
cs.PPC_INS_EVMHEUMIAAW = 148
cs.PPC_INS_EVMHEUMIANW = 149
cs.PPC_INS_EVMHEUSIAAW = 150
cs.PPC_INS_EVMHEUSIANW = 151
cs.PPC_INS_EVMHOGSMFAA = 152
cs.PPC_INS_EVMHOGSMFAN = 153
cs.PPC_INS_EVMHOGSMIAA = 154
cs.PPC_INS_EVMHOGSMIAN = 155
cs.PPC_INS_EVMHOGUMIAA = 156
cs.PPC_INS_EVMHOGUMIAN = 157
cs.PPC_INS_EVMHOSMF = 158
cs.PPC_INS_EVMHOSMFA = 159
cs.PPC_INS_EVMHOSMFAAW = 160
cs.PPC_INS_EVMHOSMFANW = 161
cs.PPC_INS_EVMHOSMI = 162
cs.PPC_INS_EVMHOSMIA = 163
cs.PPC_INS_EVMHOSMIAAW = 164
cs.PPC_INS_EVMHOSMIANW = 165
cs.PPC_INS_EVMHOSSF = 166
cs.PPC_INS_EVMHOSSFA = 167
cs.PPC_INS_EVMHOSSFAAW = 168
cs.PPC_INS_EVMHOSSFANW = 169
cs.PPC_INS_EVMHOSSIAAW = 170
cs.PPC_INS_EVMHOSSIANW = 171
cs.PPC_INS_EVMHOUMI = 172
cs.PPC_INS_EVMHOUMIA = 173
cs.PPC_INS_EVMHOUMIAAW = 174
cs.PPC_INS_EVMHOUMIANW = 175
cs.PPC_INS_EVMHOUSIAAW = 176
cs.PPC_INS_EVMHOUSIANW = 177
cs.PPC_INS_EVMRA = 178
cs.PPC_INS_EVMWHSMF = 179
cs.PPC_INS_EVMWHSMFA = 180
cs.PPC_INS_EVMWHSMI = 181
cs.PPC_INS_EVMWHSMIA = 182
cs.PPC_INS_EVMWHSSF = 183
cs.PPC_INS_EVMWHSSFA = 184
cs.PPC_INS_EVMWHUMI = 185
cs.PPC_INS_EVMWHUMIA = 186
cs.PPC_INS_EVMWLSMIAAW = 187
cs.PPC_INS_EVMWLSMIANW = 188
cs.PPC_INS_EVMWLSSIAAW = 189
cs.PPC_INS_EVMWLSSIANW = 190
cs.PPC_INS_EVMWLUMI = 191
cs.PPC_INS_EVMWLUMIA = 192
cs.PPC_INS_EVMWLUMIAAW = 193
cs.PPC_INS_EVMWLUMIANW = 194
cs.PPC_INS_EVMWLUSIAAW = 195
cs.PPC_INS_EVMWLUSIANW = 196
cs.PPC_INS_EVMWSMF = 197
cs.PPC_INS_EVMWSMFA = 198
cs.PPC_INS_EVMWSMFAA = 199
cs.PPC_INS_EVMWSMFAN = 200
cs.PPC_INS_EVMWSMI = 201
cs.PPC_INS_EVMWSMIA = 202
cs.PPC_INS_EVMWSMIAA = 203
cs.PPC_INS_EVMWSMIAN = 204
cs.PPC_INS_EVMWSSF = 205
cs.PPC_INS_EVMWSSFA = 206
cs.PPC_INS_EVMWSSFAA = 207
cs.PPC_INS_EVMWSSFAN = 208
cs.PPC_INS_EVMWUMI = 209
cs.PPC_INS_EVMWUMIA = 210
cs.PPC_INS_EVMWUMIAA = 211
cs.PPC_INS_EVMWUMIAN = 212
cs.PPC_INS_EVNAND = 213
cs.PPC_INS_EVNEG = 214
cs.PPC_INS_EVNOR = 215
cs.PPC_INS_EVOR = 216
cs.PPC_INS_EVORC = 217
cs.PPC_INS_EVRLW = 218
cs.PPC_INS_EVRLWI = 219
cs.PPC_INS_EVRNDW = 220
cs.PPC_INS_EVSLW = 221
cs.PPC_INS_EVSLWI = 222
cs.PPC_INS_EVSPLATFI = 223
cs.PPC_INS_EVSPLATI = 224
cs.PPC_INS_EVSRWIS = 225
cs.PPC_INS_EVSRWIU = 226
cs.PPC_INS_EVSRWS = 227
cs.PPC_INS_EVSRWU = 228
cs.PPC_INS_EVSTDD = 229
cs.PPC_INS_EVSTDDX = 230
cs.PPC_INS_EVSTDH = 231
cs.PPC_INS_EVSTDHX = 232
cs.PPC_INS_EVSTDW = 233
cs.PPC_INS_EVSTDWX = 234
cs.PPC_INS_EVSTWHE = 235
cs.PPC_INS_EVSTWHEX = 236
cs.PPC_INS_EVSTWHO = 237
cs.PPC_INS_EVSTWHOX = 238
cs.PPC_INS_EVSTWWE = 239
cs.PPC_INS_EVSTWWEX = 240
cs.PPC_INS_EVSTWWO = 241
cs.PPC_INS_EVSTWWOX = 242
cs.PPC_INS_EVSUBFSMIAAW = 243
cs.PPC_INS_EVSUBFSSIAAW = 244
cs.PPC_INS_EVSUBFUMIAAW = 245
cs.PPC_INS_EVSUBFUSIAAW = 246
cs.PPC_INS_EVSUBFW = 247
cs.PPC_INS_EVSUBIFW = 248
cs.PPC_INS_EVXOR = 249
cs.PPC_INS_EXTSB = 250
cs.PPC_INS_EXTSH = 251
cs.PPC_INS_EXTSW = 252
cs.PPC_INS_FABS = 253
cs.PPC_INS_FADD = 254
cs.PPC_INS_FADDS = 255
cs.PPC_INS_FCFID = 256
cs.PPC_INS_FCFIDS = 257
cs.PPC_INS_FCFIDU = 258
cs.PPC_INS_FCFIDUS = 259
cs.PPC_INS_FCMPU = 260
cs.PPC_INS_FCPSGN = 261
cs.PPC_INS_FCTID = 262
cs.PPC_INS_FCTIDUZ = 263
cs.PPC_INS_FCTIDZ = 264
cs.PPC_INS_FCTIW = 265
cs.PPC_INS_FCTIWUZ = 266
cs.PPC_INS_FCTIWZ = 267
cs.PPC_INS_FDIV = 268
cs.PPC_INS_FDIVS = 269
cs.PPC_INS_FMADD = 270
cs.PPC_INS_FMADDS = 271
cs.PPC_INS_FMR = 272
cs.PPC_INS_FMSUB = 273
cs.PPC_INS_FMSUBS = 274
cs.PPC_INS_FMUL = 275
cs.PPC_INS_FMULS = 276
cs.PPC_INS_FNABS = 277
cs.PPC_INS_FNEG = 278
cs.PPC_INS_FNMADD = 279
cs.PPC_INS_FNMADDS = 280
cs.PPC_INS_FNMSUB = 281
cs.PPC_INS_FNMSUBS = 282
cs.PPC_INS_FRE = 283
cs.PPC_INS_FRES = 284
cs.PPC_INS_FRIM = 285
cs.PPC_INS_FRIN = 286
cs.PPC_INS_FRIP = 287
cs.PPC_INS_FRIZ = 288
cs.PPC_INS_FRSP = 289
cs.PPC_INS_FRSQRTE = 290
cs.PPC_INS_FRSQRTES = 291
cs.PPC_INS_FSEL = 292
cs.PPC_INS_FSQRT = 293
cs.PPC_INS_FSQRTS = 294
cs.PPC_INS_FSUB = 295
cs.PPC_INS_FSUBS = 296
cs.PPC_INS_ICBI = 297
cs.PPC_INS_ICCCI = 298
cs.PPC_INS_ISEL = 299
cs.PPC_INS_ISYNC = 300
cs.PPC_INS_LA = 301
cs.PPC_INS_LBZ = 302
cs.PPC_INS_LBZU = 303
cs.PPC_INS_LBZUX = 304
cs.PPC_INS_LBZX = 305
cs.PPC_INS_LD = 306
cs.PPC_INS_LDARX = 307
cs.PPC_INS_LDBRX = 308
cs.PPC_INS_LDU = 309
cs.PPC_INS_LDUX = 310
cs.PPC_INS_LDX = 311
cs.PPC_INS_LFD = 312
cs.PPC_INS_LFDU = 313
cs.PPC_INS_LFDUX = 314
cs.PPC_INS_LFDX = 315
cs.PPC_INS_LFIWAX = 316
cs.PPC_INS_LFIWZX = 317
cs.PPC_INS_LFS = 318
cs.PPC_INS_LFSU = 319
cs.PPC_INS_LFSUX = 320
cs.PPC_INS_LFSX = 321
cs.PPC_INS_LHA = 322
cs.PPC_INS_LHAU = 323
cs.PPC_INS_LHAUX = 324
cs.PPC_INS_LHAX = 325
cs.PPC_INS_LHBRX = 326
cs.PPC_INS_LHZ = 327
cs.PPC_INS_LHZU = 328
cs.PPC_INS_LHZUX = 329
cs.PPC_INS_LHZX = 330
cs.PPC_INS_LI = 331
cs.PPC_INS_LIS = 332
cs.PPC_INS_LMW = 333
cs.PPC_INS_LSWI = 334
cs.PPC_INS_LVEBX = 335
cs.PPC_INS_LVEHX = 336
cs.PPC_INS_LVEWX = 337
cs.PPC_INS_LVSL = 338
cs.PPC_INS_LVSR = 339
cs.PPC_INS_LVX = 340
cs.PPC_INS_LVXL = 341
cs.PPC_INS_LWA = 342
cs.PPC_INS_LWARX = 343
cs.PPC_INS_LWAUX = 344
cs.PPC_INS_LWAX = 345
cs.PPC_INS_LWBRX = 346
cs.PPC_INS_LWZ = 347
cs.PPC_INS_LWZU = 348
cs.PPC_INS_LWZUX = 349
cs.PPC_INS_LWZX = 350
cs.PPC_INS_LXSDX = 351
cs.PPC_INS_LXVD2X = 352
cs.PPC_INS_LXVDSX = 353
cs.PPC_INS_LXVW4X = 354
cs.PPC_INS_MBAR = 355
cs.PPC_INS_MCRF = 356
cs.PPC_INS_MFCR = 357
cs.PPC_INS_MFCTR = 358
cs.PPC_INS_MFDCR = 359
cs.PPC_INS_MFFS = 360
cs.PPC_INS_MFLR = 361
cs.PPC_INS_MFMSR = 362
cs.PPC_INS_MFOCRF = 363
cs.PPC_INS_MFSPR = 364
cs.PPC_INS_MFSR = 365
cs.PPC_INS_MFSRIN = 366
cs.PPC_INS_MFTB = 367
cs.PPC_INS_MFVSCR = 368
cs.PPC_INS_MSYNC = 369
cs.PPC_INS_MTCRF = 370
cs.PPC_INS_MTCTR = 371
cs.PPC_INS_MTDCR = 372
cs.PPC_INS_MTFSB0 = 373
cs.PPC_INS_MTFSB1 = 374
cs.PPC_INS_MTFSF = 375
cs.PPC_INS_MTLR = 376
cs.PPC_INS_MTMSR = 377
cs.PPC_INS_MTMSRD = 378
cs.PPC_INS_MTOCRF = 379
cs.PPC_INS_MTSPR = 380
cs.PPC_INS_MTSR = 381
cs.PPC_INS_MTSRIN = 382
cs.PPC_INS_MTVSCR = 383
cs.PPC_INS_MULHD = 384
cs.PPC_INS_MULHDU = 385
cs.PPC_INS_MULHW = 386
cs.PPC_INS_MULHWU = 387
cs.PPC_INS_MULLD = 388
cs.PPC_INS_MULLI = 389
cs.PPC_INS_MULLW = 390
cs.PPC_INS_NAND = 391
cs.PPC_INS_NEG = 392
cs.PPC_INS_NOP = 393
cs.PPC_INS_ORI = 394
cs.PPC_INS_NOR = 395
cs.PPC_INS_OR = 396
cs.PPC_INS_ORC = 397
cs.PPC_INS_ORIS = 398
cs.PPC_INS_POPCNTD = 399
cs.PPC_INS_POPCNTW = 400
cs.PPC_INS_RFCI = 401
cs.PPC_INS_RFDI = 402
cs.PPC_INS_RFI = 403
cs.PPC_INS_RFID = 404
cs.PPC_INS_RFMCI = 405
cs.PPC_INS_RLDCL = 406
cs.PPC_INS_RLDCR = 407
cs.PPC_INS_RLDIC = 408
cs.PPC_INS_RLDICL = 409
cs.PPC_INS_RLDICR = 410
cs.PPC_INS_RLDIMI = 411
cs.PPC_INS_RLWIMI = 412
cs.PPC_INS_RLWINM = 413
cs.PPC_INS_RLWNM = 414
cs.PPC_INS_SC = 415
cs.PPC_INS_SLBIA = 416
cs.PPC_INS_SLBIE = 417
cs.PPC_INS_SLBMFEE = 418
cs.PPC_INS_SLBMTE = 419
cs.PPC_INS_SLD = 420
cs.PPC_INS_SLW = 421
cs.PPC_INS_SRAD = 422
cs.PPC_INS_SRADI = 423
cs.PPC_INS_SRAW = 424
cs.PPC_INS_SRAWI = 425
cs.PPC_INS_SRD = 426
cs.PPC_INS_SRW = 427
cs.PPC_INS_STB = 428
cs.PPC_INS_STBU = 429
cs.PPC_INS_STBUX = 430
cs.PPC_INS_STBX = 431
cs.PPC_INS_STD = 432
cs.PPC_INS_STDBRX = 433
cs.PPC_INS_STDCX = 434
cs.PPC_INS_STDU = 435
cs.PPC_INS_STDUX = 436
cs.PPC_INS_STDX = 437
cs.PPC_INS_STFD = 438
cs.PPC_INS_STFDU = 439
cs.PPC_INS_STFDUX = 440
cs.PPC_INS_STFDX = 441
cs.PPC_INS_STFIWX = 442
cs.PPC_INS_STFS = 443
cs.PPC_INS_STFSU = 444
cs.PPC_INS_STFSUX = 445
cs.PPC_INS_STFSX = 446
cs.PPC_INS_STH = 447
cs.PPC_INS_STHBRX = 448
cs.PPC_INS_STHU = 449
cs.PPC_INS_STHUX = 450
cs.PPC_INS_STHX = 451
cs.PPC_INS_STMW = 452
cs.PPC_INS_STSWI = 453
cs.PPC_INS_STVEBX = 454
cs.PPC_INS_STVEHX = 455
cs.PPC_INS_STVEWX = 456
cs.PPC_INS_STVX = 457
cs.PPC_INS_STVXL = 458
cs.PPC_INS_STW = 459
cs.PPC_INS_STWBRX = 460
cs.PPC_INS_STWCX = 461
cs.PPC_INS_STWU = 462
cs.PPC_INS_STWUX = 463
cs.PPC_INS_STWX = 464
cs.PPC_INS_STXSDX = 465
cs.PPC_INS_STXVD2X = 466
cs.PPC_INS_STXVW4X = 467
cs.PPC_INS_SUBF = 468
cs.PPC_INS_SUBFC = 469
cs.PPC_INS_SUBFE = 470
cs.PPC_INS_SUBFIC = 471
cs.PPC_INS_SUBFME = 472
cs.PPC_INS_SUBFZE = 473
cs.PPC_INS_SYNC = 474
cs.PPC_INS_TD = 475
cs.PPC_INS_TDI = 476
cs.PPC_INS_TLBIA = 477
cs.PPC_INS_TLBIE = 478
cs.PPC_INS_TLBIEL = 479
cs.PPC_INS_TLBIVAX = 480
cs.PPC_INS_TLBLD = 481
cs.PPC_INS_TLBLI = 482
cs.PPC_INS_TLBRE = 483
cs.PPC_INS_TLBSX = 484
cs.PPC_INS_TLBSYNC = 485
cs.PPC_INS_TLBWE = 486
cs.PPC_INS_TRAP = 487
cs.PPC_INS_TW = 488
cs.PPC_INS_TWI = 489
cs.PPC_INS_VADDCUW = 490
cs.PPC_INS_VADDFP = 491
cs.PPC_INS_VADDSBS = 492
cs.PPC_INS_VADDSHS = 493
cs.PPC_INS_VADDSWS = 494
cs.PPC_INS_VADDUBM = 495
cs.PPC_INS_VADDUBS = 496
cs.PPC_INS_VADDUHM = 497
cs.PPC_INS_VADDUHS = 498
cs.PPC_INS_VADDUWM = 499
cs.PPC_INS_VADDUWS = 500
cs.PPC_INS_VAND = 501
cs.PPC_INS_VANDC = 502
cs.PPC_INS_VAVGSB = 503
cs.PPC_INS_VAVGSH = 504
cs.PPC_INS_VAVGSW = 505
cs.PPC_INS_VAVGUB = 506
cs.PPC_INS_VAVGUH = 507
cs.PPC_INS_VAVGUW = 508
cs.PPC_INS_VCFSX = 509
cs.PPC_INS_VCFUX = 510
cs.PPC_INS_VCMPBFP = 511
cs.PPC_INS_VCMPEQFP = 512
cs.PPC_INS_VCMPEQUB = 513
cs.PPC_INS_VCMPEQUH = 514
cs.PPC_INS_VCMPEQUW = 515
cs.PPC_INS_VCMPGEFP = 516
cs.PPC_INS_VCMPGTFP = 517
cs.PPC_INS_VCMPGTSB = 518
cs.PPC_INS_VCMPGTSH = 519
cs.PPC_INS_VCMPGTSW = 520
cs.PPC_INS_VCMPGTUB = 521
cs.PPC_INS_VCMPGTUH = 522
cs.PPC_INS_VCMPGTUW = 523
cs.PPC_INS_VCTSXS = 524
cs.PPC_INS_VCTUXS = 525
cs.PPC_INS_VEXPTEFP = 526
cs.PPC_INS_VLOGEFP = 527
cs.PPC_INS_VMADDFP = 528
cs.PPC_INS_VMAXFP = 529
cs.PPC_INS_VMAXSB = 530
cs.PPC_INS_VMAXSH = 531
cs.PPC_INS_VMAXSW = 532
cs.PPC_INS_VMAXUB = 533
cs.PPC_INS_VMAXUH = 534
cs.PPC_INS_VMAXUW = 535
cs.PPC_INS_VMHADDSHS = 536
cs.PPC_INS_VMHRADDSHS = 537
cs.PPC_INS_VMINFP = 538
cs.PPC_INS_VMINSB = 539
cs.PPC_INS_VMINSH = 540
cs.PPC_INS_VMINSW = 541
cs.PPC_INS_VMINUB = 542
cs.PPC_INS_VMINUH = 543
cs.PPC_INS_VMINUW = 544
cs.PPC_INS_VMLADDUHM = 545
cs.PPC_INS_VMRGHB = 546
cs.PPC_INS_VMRGHH = 547
cs.PPC_INS_VMRGHW = 548
cs.PPC_INS_VMRGLB = 549
cs.PPC_INS_VMRGLH = 550
cs.PPC_INS_VMRGLW = 551
cs.PPC_INS_VMSUMMBM = 552
cs.PPC_INS_VMSUMSHM = 553
cs.PPC_INS_VMSUMSHS = 554
cs.PPC_INS_VMSUMUBM = 555
cs.PPC_INS_VMSUMUHM = 556
cs.PPC_INS_VMSUMUHS = 557
cs.PPC_INS_VMULESB = 558
cs.PPC_INS_VMULESH = 559
cs.PPC_INS_VMULEUB = 560
cs.PPC_INS_VMULEUH = 561
cs.PPC_INS_VMULOSB = 562
cs.PPC_INS_VMULOSH = 563
cs.PPC_INS_VMULOUB = 564
cs.PPC_INS_VMULOUH = 565
cs.PPC_INS_VNMSUBFP = 566
cs.PPC_INS_VNOR = 567
cs.PPC_INS_VOR = 568
cs.PPC_INS_VPERM = 569
cs.PPC_INS_VPKPX = 570
cs.PPC_INS_VPKSHSS = 571
cs.PPC_INS_VPKSHUS = 572
cs.PPC_INS_VPKSWSS = 573
cs.PPC_INS_VPKSWUS = 574
cs.PPC_INS_VPKUHUM = 575
cs.PPC_INS_VPKUHUS = 576
cs.PPC_INS_VPKUWUM = 577
cs.PPC_INS_VPKUWUS = 578
cs.PPC_INS_VREFP = 579
cs.PPC_INS_VRFIM = 580
cs.PPC_INS_VRFIN = 581
cs.PPC_INS_VRFIP = 582
cs.PPC_INS_VRFIZ = 583
cs.PPC_INS_VRLB = 584
cs.PPC_INS_VRLH = 585
cs.PPC_INS_VRLW = 586
cs.PPC_INS_VRSQRTEFP = 587
cs.PPC_INS_VSEL = 588
cs.PPC_INS_VSL = 589
cs.PPC_INS_VSLB = 590
cs.PPC_INS_VSLDOI = 591
cs.PPC_INS_VSLH = 592
cs.PPC_INS_VSLO = 593
cs.PPC_INS_VSLW = 594
cs.PPC_INS_VSPLTB = 595
cs.PPC_INS_VSPLTH = 596
cs.PPC_INS_VSPLTISB = 597
cs.PPC_INS_VSPLTISH = 598
cs.PPC_INS_VSPLTISW = 599
cs.PPC_INS_VSPLTW = 600
cs.PPC_INS_VSR = 601
cs.PPC_INS_VSRAB = 602
cs.PPC_INS_VSRAH = 603
cs.PPC_INS_VSRAW = 604
cs.PPC_INS_VSRB = 605
cs.PPC_INS_VSRH = 606
cs.PPC_INS_VSRO = 607
cs.PPC_INS_VSRW = 608
cs.PPC_INS_VSUBCUW = 609
cs.PPC_INS_VSUBFP = 610
cs.PPC_INS_VSUBSBS = 611
cs.PPC_INS_VSUBSHS = 612
cs.PPC_INS_VSUBSWS = 613
cs.PPC_INS_VSUBUBM = 614
cs.PPC_INS_VSUBUBS = 615
cs.PPC_INS_VSUBUHM = 616
cs.PPC_INS_VSUBUHS = 617
cs.PPC_INS_VSUBUWM = 618
cs.PPC_INS_VSUBUWS = 619
cs.PPC_INS_VSUM2SWS = 620
cs.PPC_INS_VSUM4SBS = 621
cs.PPC_INS_VSUM4SHS = 622
cs.PPC_INS_VSUM4UBS = 623
cs.PPC_INS_VSUMSWS = 624
cs.PPC_INS_VUPKHPX = 625
cs.PPC_INS_VUPKHSB = 626
cs.PPC_INS_VUPKHSH = 627
cs.PPC_INS_VUPKLPX = 628
cs.PPC_INS_VUPKLSB = 629
cs.PPC_INS_VUPKLSH = 630
cs.PPC_INS_VXOR = 631
cs.PPC_INS_WAIT = 632
cs.PPC_INS_WRTEE = 633
cs.PPC_INS_WRTEEI = 634
cs.PPC_INS_XOR = 635
cs.PPC_INS_XORI = 636
cs.PPC_INS_XORIS = 637
cs.PPC_INS_XSABSDP = 638
cs.PPC_INS_XSADDDP = 639
cs.PPC_INS_XSCMPODP = 640
cs.PPC_INS_XSCMPUDP = 641
cs.PPC_INS_XSCPSGNDP = 642
cs.PPC_INS_XSCVDPSP = 643
cs.PPC_INS_XSCVDPSXDS = 644
cs.PPC_INS_XSCVDPSXWS = 645
cs.PPC_INS_XSCVDPUXDS = 646
cs.PPC_INS_XSCVDPUXWS = 647
cs.PPC_INS_XSCVSPDP = 648
cs.PPC_INS_XSCVSXDDP = 649
cs.PPC_INS_XSCVUXDDP = 650
cs.PPC_INS_XSDIVDP = 651
cs.PPC_INS_XSMADDADP = 652
cs.PPC_INS_XSMADDMDP = 653
cs.PPC_INS_XSMAXDP = 654
cs.PPC_INS_XSMINDP = 655
cs.PPC_INS_XSMSUBADP = 656
cs.PPC_INS_XSMSUBMDP = 657
cs.PPC_INS_XSMULDP = 658
cs.PPC_INS_XSNABSDP = 659
cs.PPC_INS_XSNEGDP = 660
cs.PPC_INS_XSNMADDADP = 661
cs.PPC_INS_XSNMADDMDP = 662
cs.PPC_INS_XSNMSUBADP = 663
cs.PPC_INS_XSNMSUBMDP = 664
cs.PPC_INS_XSRDPI = 665
cs.PPC_INS_XSRDPIC = 666
cs.PPC_INS_XSRDPIM = 667
cs.PPC_INS_XSRDPIP = 668
cs.PPC_INS_XSRDPIZ = 669
cs.PPC_INS_XSREDP = 670
cs.PPC_INS_XSRSQRTEDP = 671
cs.PPC_INS_XSSQRTDP = 672
cs.PPC_INS_XSSUBDP = 673
cs.PPC_INS_XSTDIVDP = 674
cs.PPC_INS_XSTSQRTDP = 675
cs.PPC_INS_XVABSDP = 676
cs.PPC_INS_XVABSSP = 677
cs.PPC_INS_XVADDDP = 678
cs.PPC_INS_XVADDSP = 679
cs.PPC_INS_XVCMPEQDP = 680
cs.PPC_INS_XVCMPEQSP = 681
cs.PPC_INS_XVCMPGEDP = 682
cs.PPC_INS_XVCMPGESP = 683
cs.PPC_INS_XVCMPGTDP = 684
cs.PPC_INS_XVCMPGTSP = 685
cs.PPC_INS_XVCPSGNDP = 686
cs.PPC_INS_XVCPSGNSP = 687
cs.PPC_INS_XVCVDPSP = 688
cs.PPC_INS_XVCVDPSXDS = 689
cs.PPC_INS_XVCVDPSXWS = 690
cs.PPC_INS_XVCVDPUXDS = 691
cs.PPC_INS_XVCVDPUXWS = 692
cs.PPC_INS_XVCVSPDP = 693
cs.PPC_INS_XVCVSPSXDS = 694
cs.PPC_INS_XVCVSPSXWS = 695
cs.PPC_INS_XVCVSPUXDS = 696
cs.PPC_INS_XVCVSPUXWS = 697
cs.PPC_INS_XVCVSXDDP = 698
cs.PPC_INS_XVCVSXDSP = 699
cs.PPC_INS_XVCVSXWDP = 700
cs.PPC_INS_XVCVSXWSP = 701
cs.PPC_INS_XVCVUXDDP = 702
cs.PPC_INS_XVCVUXDSP = 703
cs.PPC_INS_XVCVUXWDP = 704
cs.PPC_INS_XVCVUXWSP = 705
cs.PPC_INS_XVDIVDP = 706
cs.PPC_INS_XVDIVSP = 707
cs.PPC_INS_XVMADDADP = 708
cs.PPC_INS_XVMADDASP = 709
cs.PPC_INS_XVMADDMDP = 710
cs.PPC_INS_XVMADDMSP = 711
cs.PPC_INS_XVMAXDP = 712
cs.PPC_INS_XVMAXSP = 713
cs.PPC_INS_XVMINDP = 714
cs.PPC_INS_XVMINSP = 715
cs.PPC_INS_XVMSUBADP = 716
cs.PPC_INS_XVMSUBASP = 717
cs.PPC_INS_XVMSUBMDP = 718
cs.PPC_INS_XVMSUBMSP = 719
cs.PPC_INS_XVMULDP = 720
cs.PPC_INS_XVMULSP = 721
cs.PPC_INS_XVNABSDP = 722
cs.PPC_INS_XVNABSSP = 723
cs.PPC_INS_XVNEGDP = 724
cs.PPC_INS_XVNEGSP = 725
cs.PPC_INS_XVNMADDADP = 726
cs.PPC_INS_XVNMADDASP = 727
cs.PPC_INS_XVNMADDMDP = 728
cs.PPC_INS_XVNMADDMSP = 729
cs.PPC_INS_XVNMSUBADP = 730
cs.PPC_INS_XVNMSUBASP = 731
cs.PPC_INS_XVNMSUBMDP = 732
cs.PPC_INS_XVNMSUBMSP = 733
cs.PPC_INS_XVRDPI = 734
cs.PPC_INS_XVRDPIC = 735
cs.PPC_INS_XVRDPIM = 736
cs.PPC_INS_XVRDPIP = 737
cs.PPC_INS_XVRDPIZ = 738
cs.PPC_INS_XVREDP = 739
cs.PPC_INS_XVRESP = 740
cs.PPC_INS_XVRSPI = 741
cs.PPC_INS_XVRSPIC = 742
cs.PPC_INS_XVRSPIM = 743
cs.PPC_INS_XVRSPIP = 744
cs.PPC_INS_XVRSPIZ = 745
cs.PPC_INS_XVRSQRTEDP = 746
cs.PPC_INS_XVRSQRTESP = 747
cs.PPC_INS_XVSQRTDP = 748
cs.PPC_INS_XVSQRTSP = 749
cs.PPC_INS_XVSUBDP = 750
cs.PPC_INS_XVSUBSP = 751
cs.PPC_INS_XVTDIVDP = 752
cs.PPC_INS_XVTDIVSP = 753
cs.PPC_INS_XVTSQRTDP = 754
cs.PPC_INS_XVTSQRTSP = 755
cs.PPC_INS_XXLAND = 756
cs.PPC_INS_XXLANDC = 757
cs.PPC_INS_XXLNOR = 758
cs.PPC_INS_XXLOR = 759
cs.PPC_INS_XXLXOR = 760
cs.PPC_INS_XXMRGHW = 761
cs.PPC_INS_XXMRGLW = 762
cs.PPC_INS_XXPERMDI = 763
cs.PPC_INS_XXSEL = 764
cs.PPC_INS_XXSLDWI = 765
cs.PPC_INS_XXSPLTW = 766
cs.PPC_INS_BCA = 767
cs.PPC_INS_BCLA = 768
cs.PPC_INS_SLWI = 769
cs.PPC_INS_SRWI = 770
cs.PPC_INS_SLDI = 771
cs.PPC_INS_BTA = 772
cs.PPC_INS_CRSET = 773
cs.PPC_INS_CRNOT = 774
cs.PPC_INS_CRMOVE = 775
cs.PPC_INS_CRCLR = 776
cs.PPC_INS_MFBR0 = 777
cs.PPC_INS_MFBR1 = 778
cs.PPC_INS_MFBR2 = 779
cs.PPC_INS_MFBR3 = 780
cs.PPC_INS_MFBR4 = 781
cs.PPC_INS_MFBR5 = 782
cs.PPC_INS_MFBR6 = 783
cs.PPC_INS_MFBR7 = 784
cs.PPC_INS_MFXER = 785
cs.PPC_INS_MFRTCU = 786
cs.PPC_INS_MFRTCL = 787
cs.PPC_INS_MFDSCR = 788
cs.PPC_INS_MFDSISR = 789
cs.PPC_INS_MFDAR = 790
cs.PPC_INS_MFSRR2 = 791
cs.PPC_INS_MFSRR3 = 792
cs.PPC_INS_MFCFAR = 793
cs.PPC_INS_MFAMR = 794
cs.PPC_INS_MFPID = 795
cs.PPC_INS_MFTBLO = 796
cs.PPC_INS_MFTBHI = 797
cs.PPC_INS_MFDBATU = 798
cs.PPC_INS_MFDBATL = 799
cs.PPC_INS_MFIBATU = 800
cs.PPC_INS_MFIBATL = 801
cs.PPC_INS_MFDCCR = 802
cs.PPC_INS_MFICCR = 803
cs.PPC_INS_MFDEAR = 804
cs.PPC_INS_MFESR = 805
cs.PPC_INS_MFSPEFSCR = 806
cs.PPC_INS_MFTCR = 807
cs.PPC_INS_MFASR = 808
cs.PPC_INS_MFPVR = 809
cs.PPC_INS_MFTBU = 810
cs.PPC_INS_MTCR = 811
cs.PPC_INS_MTBR0 = 812
cs.PPC_INS_MTBR1 = 813
cs.PPC_INS_MTBR2 = 814
cs.PPC_INS_MTBR3 = 815
cs.PPC_INS_MTBR4 = 816
cs.PPC_INS_MTBR5 = 817
cs.PPC_INS_MTBR6 = 818
cs.PPC_INS_MTBR7 = 819
cs.PPC_INS_MTXER = 820
cs.PPC_INS_MTDSCR = 821
cs.PPC_INS_MTDSISR = 822
cs.PPC_INS_MTDAR = 823
cs.PPC_INS_MTSRR2 = 824
cs.PPC_INS_MTSRR3 = 825
cs.PPC_INS_MTCFAR = 826
cs.PPC_INS_MTAMR = 827
cs.PPC_INS_MTPID = 828
cs.PPC_INS_MTTBL = 829
cs.PPC_INS_MTTBU = 830
cs.PPC_INS_MTTBLO = 831
cs.PPC_INS_MTTBHI = 832
cs.PPC_INS_MTDBATU = 833
cs.PPC_INS_MTDBATL = 834
cs.PPC_INS_MTIBATU = 835
cs.PPC_INS_MTIBATL = 836
cs.PPC_INS_MTDCCR = 837
cs.PPC_INS_MTICCR = 838
cs.PPC_INS_MTDEAR = 839
cs.PPC_INS_MTESR = 840
cs.PPC_INS_MTSPEFSCR = 841
cs.PPC_INS_MTTCR = 842
cs.PPC_INS_NOT = 843
cs.PPC_INS_MR = 844
cs.PPC_INS_ROTLD = 845
cs.PPC_INS_ROTLDI = 846
cs.PPC_INS_CLRLDI = 847
cs.PPC_INS_ROTLWI = 848
cs.PPC_INS_CLRLWI = 849
cs.PPC_INS_ROTLW = 850
cs.PPC_INS_SUB = 851
cs.PPC_INS_SUBC = 852
cs.PPC_INS_LWSYNC = 853
cs.PPC_INS_PTESYNC = 854
cs.PPC_INS_TDLT = 855
cs.PPC_INS_TDEQ = 856
cs.PPC_INS_TDGT = 857
cs.PPC_INS_TDNE = 858
cs.PPC_INS_TDLLT = 859
cs.PPC_INS_TDLGT = 860
cs.PPC_INS_TDU = 861
cs.PPC_INS_TDLTI = 862
cs.PPC_INS_TDEQI = 863
cs.PPC_INS_TDGTI = 864
cs.PPC_INS_TDNEI = 865
cs.PPC_INS_TDLLTI = 866
cs.PPC_INS_TDLGTI = 867
cs.PPC_INS_TDUI = 868
cs.PPC_INS_TLBREHI = 869
cs.PPC_INS_TLBRELO = 870
cs.PPC_INS_TLBWEHI = 871
cs.PPC_INS_TLBWELO = 872
cs.PPC_INS_TWLT = 873
cs.PPC_INS_TWEQ = 874
cs.PPC_INS_TWGT = 875
cs.PPC_INS_TWNE = 876
cs.PPC_INS_TWLLT = 877
cs.PPC_INS_TWLGT = 878
cs.PPC_INS_TWU = 879
cs.PPC_INS_TWLTI = 880
cs.PPC_INS_TWEQI = 881
cs.PPC_INS_TWGTI = 882
cs.PPC_INS_TWNEI = 883
cs.PPC_INS_TWLLTI = 884
cs.PPC_INS_TWLGTI = 885
cs.PPC_INS_TWUI = 886
cs.PPC_INS_WAITRSV = 887
cs.PPC_INS_WAITIMPL = 888
cs.PPC_INS_XNOP = 889
cs.PPC_INS_XVMOVDP = 890
cs.PPC_INS_XVMOVSP = 891
cs.PPC_INS_XXSPLTD = 892
cs.PPC_INS_XXMRGHD = 893
cs.PPC_INS_XXMRGLD = 894
cs.PPC_INS_XXSWAPD = 895
cs.PPC_INS_BT = 896
cs.PPC_INS_BF = 897
cs.PPC_INS_BDNZT = 898
cs.PPC_INS_BDNZF = 899
cs.PPC_INS_BDZF = 900
cs.PPC_INS_BDZT = 901
cs.PPC_INS_BFA = 902
cs.PPC_INS_BDNZTA = 903
cs.PPC_INS_BDNZFA = 904
cs.PPC_INS_BDZTA = 905
cs.PPC_INS_BDZFA = 906
cs.PPC_INS_BTCTR = 907
cs.PPC_INS_BFCTR = 908
cs.PPC_INS_BTCTRL = 909
cs.PPC_INS_BFCTRL = 910
cs.PPC_INS_BTL = 911
cs.PPC_INS_BFL = 912
cs.PPC_INS_BDNZTL = 913
cs.PPC_INS_BDNZFL = 914
cs.PPC_INS_BDZTL = 915
cs.PPC_INS_BDZFL = 916
cs.PPC_INS_BTLA = 917
cs.PPC_INS_BFLA = 918
cs.PPC_INS_BDNZTLA = 919
cs.PPC_INS_BDNZFLA = 920
cs.PPC_INS_BDZTLA = 921
cs.PPC_INS_BDZFLA = 922
cs.PPC_INS_BTLR = 923
cs.PPC_INS_BFLR = 924
cs.PPC_INS_BDNZTLR = 925
cs.PPC_INS_BDZTLR = 926
cs.PPC_INS_BDZFLR = 927
cs.PPC_INS_BTLRL = 928
cs.PPC_INS_BFLRL = 929
cs.PPC_INS_BDNZTLRL = 930
cs.PPC_INS_BDNZFLRL = 931
cs.PPC_INS_BDZTLRL = 932
cs.PPC_INS_BDZFLRL = 933
cs.PPC_INS_ENDING = 934
// Group of PPC instructions
cs.PPC_GRP_INVALID = 0
// Generic groups
cs.PPC_GRP_JUMP = 1
// Architecture-specific groups
cs.PPC_GRP_ALTIVEC = 128
cs.PPC_GRP_MODE32 = 129
cs.PPC_GRP_MODE64 = 130
cs.PPC_GRP_BOOKE = 131
cs.PPC_GRP_NOTBOOKE = 132
cs.PPC_GRP_SPE = 133
cs.PPC_GRP_VSX = 134
cs.PPC_GRP_E500 = 135
cs.PPC_GRP_PPC4XX = 136
cs.PPC_GRP_PPC6XX = 137
cs.PPC_GRP_ENDING = 138
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sparc_const.py]
// Enums corresponding to Sparc condition codes, both icc's and fcc's.
cs.SPARC_CC_INVALID = 0
// Integer condition codes
cs.SPARC_CC_ICC_A = 8+256
cs.SPARC_CC_ICC_N = 0+256
cs.SPARC_CC_ICC_NE = 9+256
cs.SPARC_CC_ICC_E = 1+256
cs.SPARC_CC_ICC_G = 10+256
cs.SPARC_CC_ICC_LE = 2+256
cs.SPARC_CC_ICC_GE = 11+256
cs.SPARC_CC_ICC_L = 3+256
cs.SPARC_CC_ICC_GU = 12+256
cs.SPARC_CC_ICC_LEU = 4+256
cs.SPARC_CC_ICC_CC = 13+256
cs.SPARC_CC_ICC_CS = 5+256
cs.SPARC_CC_ICC_POS = 14+256
cs.SPARC_CC_ICC_NEG = 6+256
cs.SPARC_CC_ICC_VC = 15+256
cs.SPARC_CC_ICC_VS = 7+256
// Floating condition codes
cs.SPARC_CC_FCC_A = 8+16+256
cs.SPARC_CC_FCC_N = 0+16+256
cs.SPARC_CC_FCC_U = 7+16+256
cs.SPARC_CC_FCC_G = 6+16+256
cs.SPARC_CC_FCC_UG = 5+16+256
cs.SPARC_CC_FCC_L = 4+16+256
cs.SPARC_CC_FCC_UL = 3+16+256
cs.SPARC_CC_FCC_LG = 2+16+256
cs.SPARC_CC_FCC_NE = 1+16+256
cs.SPARC_CC_FCC_E = 9+16+256
cs.SPARC_CC_FCC_UE = 10+16+256
cs.SPARC_CC_FCC_GE = 11+16+256
cs.SPARC_CC_FCC_UGE = 12+16+256
cs.SPARC_CC_FCC_LE = 13+16+256
cs.SPARC_CC_FCC_ULE = 14+16+256
cs.SPARC_CC_FCC_O = 15+16+256
// Branch hint
cs.SPARC_HINT_INVALID = 0
cs.SPARC_HINT_A = 1<<0
cs.SPARC_HINT_PT = 1<<1
cs.SPARC_HINT_PN = 1<<2
// Operand type for instruction's operands
cs.SPARC_OP_INVALID = 0
cs.SPARC_OP_REG = 1
cs.SPARC_OP_IMM = 2
cs.SPARC_OP_MEM = 3
// SPARC registers
cs.SPARC_REG_INVALID = 0
cs.SPARC_REG_F0 = 1
cs.SPARC_REG_F1 = 2
cs.SPARC_REG_F2 = 3
cs.SPARC_REG_F3 = 4
cs.SPARC_REG_F4 = 5
cs.SPARC_REG_F5 = 6
cs.SPARC_REG_F6 = 7
cs.SPARC_REG_F7 = 8
cs.SPARC_REG_F8 = 9
cs.SPARC_REG_F9 = 10
cs.SPARC_REG_F10 = 11
cs.SPARC_REG_F11 = 12
cs.SPARC_REG_F12 = 13
cs.SPARC_REG_F13 = 14
cs.SPARC_REG_F14 = 15
cs.SPARC_REG_F15 = 16
cs.SPARC_REG_F16 = 17
cs.SPARC_REG_F17 = 18
cs.SPARC_REG_F18 = 19
cs.SPARC_REG_F19 = 20
cs.SPARC_REG_F20 = 21
cs.SPARC_REG_F21 = 22
cs.SPARC_REG_F22 = 23
cs.SPARC_REG_F23 = 24
cs.SPARC_REG_F24 = 25
cs.SPARC_REG_F25 = 26
cs.SPARC_REG_F26 = 27
cs.SPARC_REG_F27 = 28
cs.SPARC_REG_F28 = 29
cs.SPARC_REG_F29 = 30
cs.SPARC_REG_F30 = 31
cs.SPARC_REG_F31 = 32
cs.SPARC_REG_F32 = 33
cs.SPARC_REG_F34 = 34
cs.SPARC_REG_F36 = 35
cs.SPARC_REG_F38 = 36
cs.SPARC_REG_F40 = 37
cs.SPARC_REG_F42 = 38
cs.SPARC_REG_F44 = 39
cs.SPARC_REG_F46 = 40
cs.SPARC_REG_F48 = 41
cs.SPARC_REG_F50 = 42
cs.SPARC_REG_F52 = 43
cs.SPARC_REG_F54 = 44
cs.SPARC_REG_F56 = 45
cs.SPARC_REG_F58 = 46
cs.SPARC_REG_F60 = 47
cs.SPARC_REG_F62 = 48
cs.SPARC_REG_FCC0 = 49
cs.SPARC_REG_FCC1 = 50
cs.SPARC_REG_FCC2 = 51
cs.SPARC_REG_FCC3 = 52
cs.SPARC_REG_FP = 53
cs.SPARC_REG_G0 = 54
cs.SPARC_REG_G1 = 55
cs.SPARC_REG_G2 = 56
cs.SPARC_REG_G3 = 57
cs.SPARC_REG_G4 = 58
cs.SPARC_REG_G5 = 59
cs.SPARC_REG_G6 = 60
cs.SPARC_REG_G7 = 61
cs.SPARC_REG_I0 = 62
cs.SPARC_REG_I1 = 63
cs.SPARC_REG_I2 = 64
cs.SPARC_REG_I3 = 65
cs.SPARC_REG_I4 = 66
cs.SPARC_REG_I5 = 67
cs.SPARC_REG_I7 = 68
cs.SPARC_REG_ICC = 69
cs.SPARC_REG_L0 = 70
cs.SPARC_REG_L1 = 71
cs.SPARC_REG_L2 = 72
cs.SPARC_REG_L3 = 73
cs.SPARC_REG_L4 = 74
cs.SPARC_REG_L5 = 75
cs.SPARC_REG_L6 = 76
cs.SPARC_REG_L7 = 77
cs.SPARC_REG_O0 = 78
cs.SPARC_REG_O1 = 79
cs.SPARC_REG_O2 = 80
cs.SPARC_REG_O3 = 81
cs.SPARC_REG_O4 = 82
cs.SPARC_REG_O5 = 83
cs.SPARC_REG_O7 = 84
cs.SPARC_REG_SP = 85
cs.SPARC_REG_Y = 86
cs.SPARC_REG_XCC = 87
cs.SPARC_REG_ENDING = 88
// cs.SPARC_REG_O6 = SPARC_REG_SP
// cs.SPARC_REG_I6 = SPARC_REG_FP
// SPARC instruction
cs.SPARC_INS_INVALID = 0
cs.SPARC_INS_ADDCC = 1
cs.SPARC_INS_ADDX = 2
cs.SPARC_INS_ADDXCC = 3
cs.SPARC_INS_ADDXC = 4
cs.SPARC_INS_ADDXCCC = 5
cs.SPARC_INS_ADD = 6
cs.SPARC_INS_ALIGNADDR = 7
cs.SPARC_INS_ALIGNADDRL = 8
cs.SPARC_INS_ANDCC = 9
cs.SPARC_INS_ANDNCC = 10
cs.SPARC_INS_ANDN = 11
cs.SPARC_INS_AND = 12
cs.SPARC_INS_ARRAY16 = 13
cs.SPARC_INS_ARRAY32 = 14
cs.SPARC_INS_ARRAY8 = 15
cs.SPARC_INS_B = 16
cs.SPARC_INS_JMP = 17
cs.SPARC_INS_BMASK = 18
cs.SPARC_INS_FB = 19
cs.SPARC_INS_BRGEZ = 20
cs.SPARC_INS_BRGZ = 21
cs.SPARC_INS_BRLEZ = 22
cs.SPARC_INS_BRLZ = 23
cs.SPARC_INS_BRNZ = 24
cs.SPARC_INS_BRZ = 25
cs.SPARC_INS_BSHUFFLE = 26
cs.SPARC_INS_CALL = 27
cs.SPARC_INS_CASX = 28
cs.SPARC_INS_CAS = 29
cs.SPARC_INS_CMASK16 = 30
cs.SPARC_INS_CMASK32 = 31
cs.SPARC_INS_CMASK8 = 32
cs.SPARC_INS_CMP = 33
cs.SPARC_INS_EDGE16 = 34
cs.SPARC_INS_EDGE16L = 35
cs.SPARC_INS_EDGE16LN = 36
cs.SPARC_INS_EDGE16N = 37
cs.SPARC_INS_EDGE32 = 38
cs.SPARC_INS_EDGE32L = 39
cs.SPARC_INS_EDGE32LN = 40
cs.SPARC_INS_EDGE32N = 41
cs.SPARC_INS_EDGE8 = 42
cs.SPARC_INS_EDGE8L = 43
cs.SPARC_INS_EDGE8LN = 44
cs.SPARC_INS_EDGE8N = 45
cs.SPARC_INS_FABSD = 46
cs.SPARC_INS_FABSQ = 47
cs.SPARC_INS_FABSS = 48
cs.SPARC_INS_FADDD = 49
cs.SPARC_INS_FADDQ = 50
cs.SPARC_INS_FADDS = 51
cs.SPARC_INS_FALIGNDATA = 52
cs.SPARC_INS_FAND = 53
cs.SPARC_INS_FANDNOT1 = 54
cs.SPARC_INS_FANDNOT1S = 55
cs.SPARC_INS_FANDNOT2 = 56
cs.SPARC_INS_FANDNOT2S = 57
cs.SPARC_INS_FANDS = 58
cs.SPARC_INS_FCHKSM16 = 59
cs.SPARC_INS_FCMPD = 60
cs.SPARC_INS_FCMPEQ16 = 61
cs.SPARC_INS_FCMPEQ32 = 62
cs.SPARC_INS_FCMPGT16 = 63
cs.SPARC_INS_FCMPGT32 = 64
cs.SPARC_INS_FCMPLE16 = 65
cs.SPARC_INS_FCMPLE32 = 66
cs.SPARC_INS_FCMPNE16 = 67
cs.SPARC_INS_FCMPNE32 = 68
cs.SPARC_INS_FCMPQ = 69
cs.SPARC_INS_FCMPS = 70
cs.SPARC_INS_FDIVD = 71
cs.SPARC_INS_FDIVQ = 72
cs.SPARC_INS_FDIVS = 73
cs.SPARC_INS_FDMULQ = 74
cs.SPARC_INS_FDTOI = 75
cs.SPARC_INS_FDTOQ = 76
cs.SPARC_INS_FDTOS = 77
cs.SPARC_INS_FDTOX = 78
cs.SPARC_INS_FEXPAND = 79
cs.SPARC_INS_FHADDD = 80
cs.SPARC_INS_FHADDS = 81
cs.SPARC_INS_FHSUBD = 82
cs.SPARC_INS_FHSUBS = 83
cs.SPARC_INS_FITOD = 84
cs.SPARC_INS_FITOQ = 85
cs.SPARC_INS_FITOS = 86
cs.SPARC_INS_FLCMPD = 87
cs.SPARC_INS_FLCMPS = 88
cs.SPARC_INS_FLUSHW = 89
cs.SPARC_INS_FMEAN16 = 90
cs.SPARC_INS_FMOVD = 91
cs.SPARC_INS_FMOVQ = 92
cs.SPARC_INS_FMOVRDGEZ = 93
cs.SPARC_INS_FMOVRQGEZ = 94
cs.SPARC_INS_FMOVRSGEZ = 95
cs.SPARC_INS_FMOVRDGZ = 96
cs.SPARC_INS_FMOVRQGZ = 97
cs.SPARC_INS_FMOVRSGZ = 98
cs.SPARC_INS_FMOVRDLEZ = 99
cs.SPARC_INS_FMOVRQLEZ = 100
cs.SPARC_INS_FMOVRSLEZ = 101
cs.SPARC_INS_FMOVRDLZ = 102
cs.SPARC_INS_FMOVRQLZ = 103
cs.SPARC_INS_FMOVRSLZ = 104
cs.SPARC_INS_FMOVRDNZ = 105
cs.SPARC_INS_FMOVRQNZ = 106
cs.SPARC_INS_FMOVRSNZ = 107
cs.SPARC_INS_FMOVRDZ = 108
cs.SPARC_INS_FMOVRQZ = 109
cs.SPARC_INS_FMOVRSZ = 110
cs.SPARC_INS_FMOVS = 111
cs.SPARC_INS_FMUL8SUX16 = 112
cs.SPARC_INS_FMUL8ULX16 = 113
cs.SPARC_INS_FMUL8X16 = 114
cs.SPARC_INS_FMUL8X16AL = 115
cs.SPARC_INS_FMUL8X16AU = 116
cs.SPARC_INS_FMULD = 117
cs.SPARC_INS_FMULD8SUX16 = 118
cs.SPARC_INS_FMULD8ULX16 = 119
cs.SPARC_INS_FMULQ = 120
cs.SPARC_INS_FMULS = 121
cs.SPARC_INS_FNADDD = 122
cs.SPARC_INS_FNADDS = 123
cs.SPARC_INS_FNAND = 124
cs.SPARC_INS_FNANDS = 125
cs.SPARC_INS_FNEGD = 126
cs.SPARC_INS_FNEGQ = 127
cs.SPARC_INS_FNEGS = 128
cs.SPARC_INS_FNHADDD = 129
cs.SPARC_INS_FNHADDS = 130
cs.SPARC_INS_FNOR = 131
cs.SPARC_INS_FNORS = 132
cs.SPARC_INS_FNOT1 = 133
cs.SPARC_INS_FNOT1S = 134
cs.SPARC_INS_FNOT2 = 135
cs.SPARC_INS_FNOT2S = 136
cs.SPARC_INS_FONE = 137
cs.SPARC_INS_FONES = 138
cs.SPARC_INS_FOR = 139
cs.SPARC_INS_FORNOT1 = 140
cs.SPARC_INS_FORNOT1S = 141
cs.SPARC_INS_FORNOT2 = 142
cs.SPARC_INS_FORNOT2S = 143
cs.SPARC_INS_FORS = 144
cs.SPARC_INS_FPACK16 = 145
cs.SPARC_INS_FPACK32 = 146
cs.SPARC_INS_FPACKFIX = 147
cs.SPARC_INS_FPADD16 = 148
cs.SPARC_INS_FPADD16S = 149
cs.SPARC_INS_FPADD32 = 150
cs.SPARC_INS_FPADD32S = 151
cs.SPARC_INS_FPADD64 = 152
cs.SPARC_INS_FPMERGE = 153
cs.SPARC_INS_FPSUB16 = 154
cs.SPARC_INS_FPSUB16S = 155
cs.SPARC_INS_FPSUB32 = 156
cs.SPARC_INS_FPSUB32S = 157
cs.SPARC_INS_FQTOD = 158
cs.SPARC_INS_FQTOI = 159
cs.SPARC_INS_FQTOS = 160
cs.SPARC_INS_FQTOX = 161
cs.SPARC_INS_FSLAS16 = 162
cs.SPARC_INS_FSLAS32 = 163
cs.SPARC_INS_FSLL16 = 164
cs.SPARC_INS_FSLL32 = 165
cs.SPARC_INS_FSMULD = 166
cs.SPARC_INS_FSQRTD = 167
cs.SPARC_INS_FSQRTQ = 168
cs.SPARC_INS_FSQRTS = 169
cs.SPARC_INS_FSRA16 = 170
cs.SPARC_INS_FSRA32 = 171
cs.SPARC_INS_FSRC1 = 172
cs.SPARC_INS_FSRC1S = 173
cs.SPARC_INS_FSRC2 = 174
cs.SPARC_INS_FSRC2S = 175
cs.SPARC_INS_FSRL16 = 176
cs.SPARC_INS_FSRL32 = 177
cs.SPARC_INS_FSTOD = 178
cs.SPARC_INS_FSTOI = 179
cs.SPARC_INS_FSTOQ = 180
cs.SPARC_INS_FSTOX = 181
cs.SPARC_INS_FSUBD = 182
cs.SPARC_INS_FSUBQ = 183
cs.SPARC_INS_FSUBS = 184
cs.SPARC_INS_FXNOR = 185
cs.SPARC_INS_FXNORS = 186
cs.SPARC_INS_FXOR = 187
cs.SPARC_INS_FXORS = 188
cs.SPARC_INS_FXTOD = 189
cs.SPARC_INS_FXTOQ = 190
cs.SPARC_INS_FXTOS = 191
cs.SPARC_INS_FZERO = 192
cs.SPARC_INS_FZEROS = 193
cs.SPARC_INS_JMPL = 194
cs.SPARC_INS_LDD = 195
cs.SPARC_INS_LD = 196
cs.SPARC_INS_LDQ = 197
cs.SPARC_INS_LDSB = 198
cs.SPARC_INS_LDSH = 199
cs.SPARC_INS_LDSW = 200
cs.SPARC_INS_LDUB = 201
cs.SPARC_INS_LDUH = 202
cs.SPARC_INS_LDX = 203
cs.SPARC_INS_LZCNT = 204
cs.SPARC_INS_MEMBAR = 205
cs.SPARC_INS_MOVDTOX = 206
cs.SPARC_INS_MOV = 207
cs.SPARC_INS_MOVRGEZ = 208
cs.SPARC_INS_MOVRGZ = 209
cs.SPARC_INS_MOVRLEZ = 210
cs.SPARC_INS_MOVRLZ = 211
cs.SPARC_INS_MOVRNZ = 212
cs.SPARC_INS_MOVRZ = 213
cs.SPARC_INS_MOVSTOSW = 214
cs.SPARC_INS_MOVSTOUW = 215
cs.SPARC_INS_MULX = 216
cs.SPARC_INS_NOP = 217
cs.SPARC_INS_ORCC = 218
cs.SPARC_INS_ORNCC = 219
cs.SPARC_INS_ORN = 220
cs.SPARC_INS_OR = 221
cs.SPARC_INS_PDIST = 222
cs.SPARC_INS_PDISTN = 223
cs.SPARC_INS_POPC = 224
cs.SPARC_INS_RD = 225
cs.SPARC_INS_RESTORE = 226
cs.SPARC_INS_RETT = 227
cs.SPARC_INS_SAVE = 228
cs.SPARC_INS_SDIVCC = 229
cs.SPARC_INS_SDIVX = 230
cs.SPARC_INS_SDIV = 231
cs.SPARC_INS_SETHI = 232
cs.SPARC_INS_SHUTDOWN = 233
cs.SPARC_INS_SIAM = 234
cs.SPARC_INS_SLLX = 235
cs.SPARC_INS_SLL = 236
cs.SPARC_INS_SMULCC = 237
cs.SPARC_INS_SMUL = 238
cs.SPARC_INS_SRAX = 239
cs.SPARC_INS_SRA = 240
cs.SPARC_INS_SRLX = 241
cs.SPARC_INS_SRL = 242
cs.SPARC_INS_STBAR = 243
cs.SPARC_INS_STB = 244
cs.SPARC_INS_STD = 245
cs.SPARC_INS_ST = 246
cs.SPARC_INS_STH = 247
cs.SPARC_INS_STQ = 248
cs.SPARC_INS_STX = 249
cs.SPARC_INS_SUBCC = 250
cs.SPARC_INS_SUBX = 251
cs.SPARC_INS_SUBXCC = 252
cs.SPARC_INS_SUB = 253
cs.SPARC_INS_SWAP = 254
cs.SPARC_INS_TADDCCTV = 255
cs.SPARC_INS_TADDCC = 256
cs.SPARC_INS_T = 257
cs.SPARC_INS_TSUBCCTV = 258
cs.SPARC_INS_TSUBCC = 259
cs.SPARC_INS_UDIVCC = 260
cs.SPARC_INS_UDIVX = 261
cs.SPARC_INS_UDIV = 262
cs.SPARC_INS_UMULCC = 263
cs.SPARC_INS_UMULXHI = 264
cs.SPARC_INS_UMUL = 265
cs.SPARC_INS_UNIMP = 266
cs.SPARC_INS_FCMPED = 267
cs.SPARC_INS_FCMPEQ = 268
cs.SPARC_INS_FCMPES = 269
cs.SPARC_INS_WR = 270
cs.SPARC_INS_XMULX = 271
cs.SPARC_INS_XMULXHI = 272
cs.SPARC_INS_XNORCC = 273
cs.SPARC_INS_XNOR = 274
cs.SPARC_INS_XORCC = 275
cs.SPARC_INS_XOR = 276
cs.SPARC_INS_RET = 277
cs.SPARC_INS_RETL = 278
cs.SPARC_INS_ENDING = 279
// Group of SPARC instructions
cs.SPARC_GRP_INVALID = 0
// Generic groups
cs.SPARC_GRP_JUMP = 1
// Architecture-specific groups
cs.SPARC_GRP_HARDQUAD = 128
cs.SPARC_GRP_V9 = 129
cs.SPARC_GRP_VIS = 130
cs.SPARC_GRP_VIS2 = 131
cs.SPARC_GRP_VIS3 = 132
cs.SPARC_GRP_32BIT = 133
cs.SPARC_GRP_64BIT = 134
cs.SPARC_GRP_ENDING = 135
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [sysz_const.py]
// Enums corresponding to SystemZ condition codes
cs.SYSZ_CC_INVALID = 0
cs.SYSZ_CC_O = 1
cs.SYSZ_CC_H = 2
cs.SYSZ_CC_NLE = 3
cs.SYSZ_CC_L = 4
cs.SYSZ_CC_NHE = 5
cs.SYSZ_CC_LH = 6
cs.SYSZ_CC_NE = 7
cs.SYSZ_CC_E = 8
cs.SYSZ_CC_NLH = 9
cs.SYSZ_CC_HE = 10
cs.SYSZ_CC_NL = 11
cs.SYSZ_CC_LE = 12
cs.SYSZ_CC_NH = 13
cs.SYSZ_CC_NO = 14
// Operand type for instruction's operands
cs.SYSZ_OP_INVALID = 0
cs.SYSZ_OP_REG = 1
cs.SYSZ_OP_IMM = 2
cs.SYSZ_OP_MEM = 3
cs.SYSZ_OP_ACREG = 64
// SystemZ registers
cs.SYSZ_REG_INVALID = 0
cs.SYSZ_REG_0 = 1
cs.SYSZ_REG_1 = 2
cs.SYSZ_REG_2 = 3
cs.SYSZ_REG_3 = 4
cs.SYSZ_REG_4 = 5
cs.SYSZ_REG_5 = 6
cs.SYSZ_REG_6 = 7
cs.SYSZ_REG_7 = 8
cs.SYSZ_REG_8 = 9
cs.SYSZ_REG_9 = 10
cs.SYSZ_REG_10 = 11
cs.SYSZ_REG_11 = 12
cs.SYSZ_REG_12 = 13
cs.SYSZ_REG_13 = 14
cs.SYSZ_REG_14 = 15
cs.SYSZ_REG_15 = 16
cs.SYSZ_REG_CC = 17
cs.SYSZ_REG_F0 = 18
cs.SYSZ_REG_F1 = 19
cs.SYSZ_REG_F2 = 20
cs.SYSZ_REG_F3 = 21
cs.SYSZ_REG_F4 = 22
cs.SYSZ_REG_F5 = 23
cs.SYSZ_REG_F6 = 24
cs.SYSZ_REG_F7 = 25
cs.SYSZ_REG_F8 = 26
cs.SYSZ_REG_F9 = 27
cs.SYSZ_REG_F10 = 28
cs.SYSZ_REG_F11 = 29
cs.SYSZ_REG_F12 = 30
cs.SYSZ_REG_F13 = 31
cs.SYSZ_REG_F14 = 32
cs.SYSZ_REG_F15 = 33
cs.SYSZ_REG_R0L = 34
cs.SYSZ_REG_ENDING = 35
// SystemZ instruction
cs.SYSZ_INS_INVALID = 0
cs.SYSZ_INS_A = 1
cs.SYSZ_INS_ADB = 2
cs.SYSZ_INS_ADBR = 3
cs.SYSZ_INS_AEB = 4
cs.SYSZ_INS_AEBR = 5
cs.SYSZ_INS_AFI = 6
cs.SYSZ_INS_AG = 7
cs.SYSZ_INS_AGF = 8
cs.SYSZ_INS_AGFI = 9
cs.SYSZ_INS_AGFR = 10
cs.SYSZ_INS_AGHI = 11
cs.SYSZ_INS_AGHIK = 12
cs.SYSZ_INS_AGR = 13
cs.SYSZ_INS_AGRK = 14
cs.SYSZ_INS_AGSI = 15
cs.SYSZ_INS_AH = 16
cs.SYSZ_INS_AHI = 17
cs.SYSZ_INS_AHIK = 18
cs.SYSZ_INS_AHY = 19
cs.SYSZ_INS_AIH = 20
cs.SYSZ_INS_AL = 21
cs.SYSZ_INS_ALC = 22
cs.SYSZ_INS_ALCG = 23
cs.SYSZ_INS_ALCGR = 24
cs.SYSZ_INS_ALCR = 25
cs.SYSZ_INS_ALFI = 26
cs.SYSZ_INS_ALG = 27
cs.SYSZ_INS_ALGF = 28
cs.SYSZ_INS_ALGFI = 29
cs.SYSZ_INS_ALGFR = 30
cs.SYSZ_INS_ALGHSIK = 31
cs.SYSZ_INS_ALGR = 32
cs.SYSZ_INS_ALGRK = 33
cs.SYSZ_INS_ALHSIK = 34
cs.SYSZ_INS_ALR = 35
cs.SYSZ_INS_ALRK = 36
cs.SYSZ_INS_ALY = 37
cs.SYSZ_INS_AR = 38
cs.SYSZ_INS_ARK = 39
cs.SYSZ_INS_ASI = 40
cs.SYSZ_INS_AXBR = 41
cs.SYSZ_INS_AY = 42
cs.SYSZ_INS_BCR = 43
cs.SYSZ_INS_BRC = 44
cs.SYSZ_INS_BRCL = 45
cs.SYSZ_INS_CGIJ = 46
cs.SYSZ_INS_CGRJ = 47
cs.SYSZ_INS_CIJ = 48
cs.SYSZ_INS_CLGIJ = 49
cs.SYSZ_INS_CLGRJ = 50
cs.SYSZ_INS_CLIJ = 51
cs.SYSZ_INS_CLRJ = 52
cs.SYSZ_INS_CRJ = 53
cs.SYSZ_INS_BER = 54
cs.SYSZ_INS_JE = 55
cs.SYSZ_INS_JGE = 56
cs.SYSZ_INS_LOCE = 57
cs.SYSZ_INS_LOCGE = 58
cs.SYSZ_INS_LOCGRE = 59
cs.SYSZ_INS_LOCRE = 60
cs.SYSZ_INS_STOCE = 61
cs.SYSZ_INS_STOCGE = 62
cs.SYSZ_INS_BHR = 63
cs.SYSZ_INS_BHER = 64
cs.SYSZ_INS_JHE = 65
cs.SYSZ_INS_JGHE = 66
cs.SYSZ_INS_LOCHE = 67
cs.SYSZ_INS_LOCGHE = 68
cs.SYSZ_INS_LOCGRHE = 69
cs.SYSZ_INS_LOCRHE = 70
cs.SYSZ_INS_STOCHE = 71
cs.SYSZ_INS_STOCGHE = 72
cs.SYSZ_INS_JH = 73
cs.SYSZ_INS_JGH = 74
cs.SYSZ_INS_LOCH = 75
cs.SYSZ_INS_LOCGH = 76
cs.SYSZ_INS_LOCGRH = 77
cs.SYSZ_INS_LOCRH = 78
cs.SYSZ_INS_STOCH = 79
cs.SYSZ_INS_STOCGH = 80
cs.SYSZ_INS_CGIJNLH = 81
cs.SYSZ_INS_CGRJNLH = 82
cs.SYSZ_INS_CIJNLH = 83
cs.SYSZ_INS_CLGIJNLH = 84
cs.SYSZ_INS_CLGRJNLH = 85
cs.SYSZ_INS_CLIJNLH = 86
cs.SYSZ_INS_CLRJNLH = 87
cs.SYSZ_INS_CRJNLH = 88
cs.SYSZ_INS_CGIJE = 89
cs.SYSZ_INS_CGRJE = 90
cs.SYSZ_INS_CIJE = 91
cs.SYSZ_INS_CLGIJE = 92
cs.SYSZ_INS_CLGRJE = 93
cs.SYSZ_INS_CLIJE = 94
cs.SYSZ_INS_CLRJE = 95
cs.SYSZ_INS_CRJE = 96
cs.SYSZ_INS_CGIJNLE = 97
cs.SYSZ_INS_CGRJNLE = 98
cs.SYSZ_INS_CIJNLE = 99
cs.SYSZ_INS_CLGIJNLE = 100
cs.SYSZ_INS_CLGRJNLE = 101
cs.SYSZ_INS_CLIJNLE = 102
cs.SYSZ_INS_CLRJNLE = 103
cs.SYSZ_INS_CRJNLE = 104
cs.SYSZ_INS_CGIJH = 105
cs.SYSZ_INS_CGRJH = 106
cs.SYSZ_INS_CIJH = 107
cs.SYSZ_INS_CLGIJH = 108
cs.SYSZ_INS_CLGRJH = 109
cs.SYSZ_INS_CLIJH = 110
cs.SYSZ_INS_CLRJH = 111
cs.SYSZ_INS_CRJH = 112
cs.SYSZ_INS_CGIJNL = 113
cs.SYSZ_INS_CGRJNL = 114
cs.SYSZ_INS_CIJNL = 115
cs.SYSZ_INS_CLGIJNL = 116
cs.SYSZ_INS_CLGRJNL = 117
cs.SYSZ_INS_CLIJNL = 118
cs.SYSZ_INS_CLRJNL = 119
cs.SYSZ_INS_CRJNL = 120
cs.SYSZ_INS_CGIJHE = 121
cs.SYSZ_INS_CGRJHE = 122
cs.SYSZ_INS_CIJHE = 123
cs.SYSZ_INS_CLGIJHE = 124
cs.SYSZ_INS_CLGRJHE = 125
cs.SYSZ_INS_CLIJHE = 126
cs.SYSZ_INS_CLRJHE = 127
cs.SYSZ_INS_CRJHE = 128
cs.SYSZ_INS_CGIJNHE = 129
cs.SYSZ_INS_CGRJNHE = 130
cs.SYSZ_INS_CIJNHE = 131
cs.SYSZ_INS_CLGIJNHE = 132
cs.SYSZ_INS_CLGRJNHE = 133
cs.SYSZ_INS_CLIJNHE = 134
cs.SYSZ_INS_CLRJNHE = 135
cs.SYSZ_INS_CRJNHE = 136
cs.SYSZ_INS_CGIJL = 137
cs.SYSZ_INS_CGRJL = 138
cs.SYSZ_INS_CIJL = 139
cs.SYSZ_INS_CLGIJL = 140
cs.SYSZ_INS_CLGRJL = 141
cs.SYSZ_INS_CLIJL = 142
cs.SYSZ_INS_CLRJL = 143
cs.SYSZ_INS_CRJL = 144
cs.SYSZ_INS_CGIJNH = 145
cs.SYSZ_INS_CGRJNH = 146
cs.SYSZ_INS_CIJNH = 147
cs.SYSZ_INS_CLGIJNH = 148
cs.SYSZ_INS_CLGRJNH = 149
cs.SYSZ_INS_CLIJNH = 150
cs.SYSZ_INS_CLRJNH = 151
cs.SYSZ_INS_CRJNH = 152
cs.SYSZ_INS_CGIJLE = 153
cs.SYSZ_INS_CGRJLE = 154
cs.SYSZ_INS_CIJLE = 155
cs.SYSZ_INS_CLGIJLE = 156
cs.SYSZ_INS_CLGRJLE = 157
cs.SYSZ_INS_CLIJLE = 158
cs.SYSZ_INS_CLRJLE = 159
cs.SYSZ_INS_CRJLE = 160
cs.SYSZ_INS_CGIJNE = 161
cs.SYSZ_INS_CGRJNE = 162
cs.SYSZ_INS_CIJNE = 163
cs.SYSZ_INS_CLGIJNE = 164
cs.SYSZ_INS_CLGRJNE = 165
cs.SYSZ_INS_CLIJNE = 166
cs.SYSZ_INS_CLRJNE = 167
cs.SYSZ_INS_CRJNE = 168
cs.SYSZ_INS_CGIJLH = 169
cs.SYSZ_INS_CGRJLH = 170
cs.SYSZ_INS_CIJLH = 171
cs.SYSZ_INS_CLGIJLH = 172
cs.SYSZ_INS_CLGRJLH = 173
cs.SYSZ_INS_CLIJLH = 174
cs.SYSZ_INS_CLRJLH = 175
cs.SYSZ_INS_CRJLH = 176
cs.SYSZ_INS_BLR = 177
cs.SYSZ_INS_BLER = 178
cs.SYSZ_INS_JLE = 179
cs.SYSZ_INS_JGLE = 180
cs.SYSZ_INS_LOCLE = 181
cs.SYSZ_INS_LOCGLE = 182
cs.SYSZ_INS_LOCGRLE = 183
cs.SYSZ_INS_LOCRLE = 184
cs.SYSZ_INS_STOCLE = 185
cs.SYSZ_INS_STOCGLE = 186
cs.SYSZ_INS_BLHR = 187
cs.SYSZ_INS_JLH = 188
cs.SYSZ_INS_JGLH = 189
cs.SYSZ_INS_LOCLH = 190
cs.SYSZ_INS_LOCGLH = 191
cs.SYSZ_INS_LOCGRLH = 192
cs.SYSZ_INS_LOCRLH = 193
cs.SYSZ_INS_STOCLH = 194
cs.SYSZ_INS_STOCGLH = 195
cs.SYSZ_INS_JL = 196
cs.SYSZ_INS_JGL = 197
cs.SYSZ_INS_LOCL = 198
cs.SYSZ_INS_LOCGL = 199
cs.SYSZ_INS_LOCGRL = 200
cs.SYSZ_INS_LOCRL = 201
cs.SYSZ_INS_LOC = 202
cs.SYSZ_INS_LOCG = 203
cs.SYSZ_INS_LOCGR = 204
cs.SYSZ_INS_LOCR = 205
cs.SYSZ_INS_STOCL = 206
cs.SYSZ_INS_STOCGL = 207
cs.SYSZ_INS_BNER = 208
cs.SYSZ_INS_JNE = 209
cs.SYSZ_INS_JGNE = 210
cs.SYSZ_INS_LOCNE = 211
cs.SYSZ_INS_LOCGNE = 212
cs.SYSZ_INS_LOCGRNE = 213
cs.SYSZ_INS_LOCRNE = 214
cs.SYSZ_INS_STOCNE = 215
cs.SYSZ_INS_STOCGNE = 216
cs.SYSZ_INS_BNHR = 217
cs.SYSZ_INS_BNHER = 218
cs.SYSZ_INS_JNHE = 219
cs.SYSZ_INS_JGNHE = 220
cs.SYSZ_INS_LOCNHE = 221
cs.SYSZ_INS_LOCGNHE = 222
cs.SYSZ_INS_LOCGRNHE = 223
cs.SYSZ_INS_LOCRNHE = 224
cs.SYSZ_INS_STOCNHE = 225
cs.SYSZ_INS_STOCGNHE = 226
cs.SYSZ_INS_JNH = 227
cs.SYSZ_INS_JGNH = 228
cs.SYSZ_INS_LOCNH = 229
cs.SYSZ_INS_LOCGNH = 230
cs.SYSZ_INS_LOCGRNH = 231
cs.SYSZ_INS_LOCRNH = 232
cs.SYSZ_INS_STOCNH = 233
cs.SYSZ_INS_STOCGNH = 234
cs.SYSZ_INS_BNLR = 235
cs.SYSZ_INS_BNLER = 236
cs.SYSZ_INS_JNLE = 237
cs.SYSZ_INS_JGNLE = 238
cs.SYSZ_INS_LOCNLE = 239
cs.SYSZ_INS_LOCGNLE = 240
cs.SYSZ_INS_LOCGRNLE = 241
cs.SYSZ_INS_LOCRNLE = 242
cs.SYSZ_INS_STOCNLE = 243
cs.SYSZ_INS_STOCGNLE = 244
cs.SYSZ_INS_BNLHR = 245
cs.SYSZ_INS_JNLH = 246
cs.SYSZ_INS_JGNLH = 247
cs.SYSZ_INS_LOCNLH = 248
cs.SYSZ_INS_LOCGNLH = 249
cs.SYSZ_INS_LOCGRNLH = 250
cs.SYSZ_INS_LOCRNLH = 251
cs.SYSZ_INS_STOCNLH = 252
cs.SYSZ_INS_STOCGNLH = 253
cs.SYSZ_INS_JNL = 254
cs.SYSZ_INS_JGNL = 255
cs.SYSZ_INS_LOCNL = 256
cs.SYSZ_INS_LOCGNL = 257
cs.SYSZ_INS_LOCGRNL = 258
cs.SYSZ_INS_LOCRNL = 259
cs.SYSZ_INS_STOCNL = 260
cs.SYSZ_INS_STOCGNL = 261
cs.SYSZ_INS_BNOR = 262
cs.SYSZ_INS_JNO = 263
cs.SYSZ_INS_JGNO = 264
cs.SYSZ_INS_LOCNO = 265
cs.SYSZ_INS_LOCGNO = 266
cs.SYSZ_INS_LOCGRNO = 267
cs.SYSZ_INS_LOCRNO = 268
cs.SYSZ_INS_STOCNO = 269
cs.SYSZ_INS_STOCGNO = 270
cs.SYSZ_INS_BOR = 271
cs.SYSZ_INS_JO = 272
cs.SYSZ_INS_JGO = 273
cs.SYSZ_INS_LOCO = 274
cs.SYSZ_INS_LOCGO = 275
cs.SYSZ_INS_LOCGRO = 276
cs.SYSZ_INS_LOCRO = 277
cs.SYSZ_INS_STOCO = 278
cs.SYSZ_INS_STOCGO = 279
cs.SYSZ_INS_STOC = 280
cs.SYSZ_INS_STOCG = 281
cs.SYSZ_INS_BASR = 282
cs.SYSZ_INS_BR = 283
cs.SYSZ_INS_BRAS = 284
cs.SYSZ_INS_BRASL = 285
cs.SYSZ_INS_J = 286
cs.SYSZ_INS_JG = 287
cs.SYSZ_INS_BRCT = 288
cs.SYSZ_INS_BRCTG = 289
cs.SYSZ_INS_C = 290
cs.SYSZ_INS_CDB = 291
cs.SYSZ_INS_CDBR = 292
cs.SYSZ_INS_CDFBR = 293
cs.SYSZ_INS_CDGBR = 294
cs.SYSZ_INS_CDLFBR = 295
cs.SYSZ_INS_CDLGBR = 296
cs.SYSZ_INS_CEB = 297
cs.SYSZ_INS_CEBR = 298
cs.SYSZ_INS_CEFBR = 299
cs.SYSZ_INS_CEGBR = 300
cs.SYSZ_INS_CELFBR = 301
cs.SYSZ_INS_CELGBR = 302
cs.SYSZ_INS_CFDBR = 303
cs.SYSZ_INS_CFEBR = 304
cs.SYSZ_INS_CFI = 305
cs.SYSZ_INS_CFXBR = 306
cs.SYSZ_INS_CG = 307
cs.SYSZ_INS_CGDBR = 308
cs.SYSZ_INS_CGEBR = 309
cs.SYSZ_INS_CGF = 310
cs.SYSZ_INS_CGFI = 311
cs.SYSZ_INS_CGFR = 312
cs.SYSZ_INS_CGFRL = 313
cs.SYSZ_INS_CGH = 314
cs.SYSZ_INS_CGHI = 315
cs.SYSZ_INS_CGHRL = 316
cs.SYSZ_INS_CGHSI = 317
cs.SYSZ_INS_CGR = 318
cs.SYSZ_INS_CGRL = 319
cs.SYSZ_INS_CGXBR = 320
cs.SYSZ_INS_CH = 321
cs.SYSZ_INS_CHF = 322
cs.SYSZ_INS_CHHSI = 323
cs.SYSZ_INS_CHI = 324
cs.SYSZ_INS_CHRL = 325
cs.SYSZ_INS_CHSI = 326
cs.SYSZ_INS_CHY = 327
cs.SYSZ_INS_CIH = 328
cs.SYSZ_INS_CL = 329
cs.SYSZ_INS_CLC = 330
cs.SYSZ_INS_CLFDBR = 331
cs.SYSZ_INS_CLFEBR = 332
cs.SYSZ_INS_CLFHSI = 333
cs.SYSZ_INS_CLFI = 334
cs.SYSZ_INS_CLFXBR = 335
cs.SYSZ_INS_CLG = 336
cs.SYSZ_INS_CLGDBR = 337
cs.SYSZ_INS_CLGEBR = 338
cs.SYSZ_INS_CLGF = 339
cs.SYSZ_INS_CLGFI = 340
cs.SYSZ_INS_CLGFR = 341
cs.SYSZ_INS_CLGFRL = 342
cs.SYSZ_INS_CLGHRL = 343
cs.SYSZ_INS_CLGHSI = 344
cs.SYSZ_INS_CLGR = 345
cs.SYSZ_INS_CLGRL = 346
cs.SYSZ_INS_CLGXBR = 347
cs.SYSZ_INS_CLHF = 348
cs.SYSZ_INS_CLHHSI = 349
cs.SYSZ_INS_CLHRL = 350
cs.SYSZ_INS_CLI = 351
cs.SYSZ_INS_CLIH = 352
cs.SYSZ_INS_CLIY = 353
cs.SYSZ_INS_CLR = 354
cs.SYSZ_INS_CLRL = 355
cs.SYSZ_INS_CLST = 356
cs.SYSZ_INS_CLY = 357
cs.SYSZ_INS_CPSDR = 358
cs.SYSZ_INS_CR = 359
cs.SYSZ_INS_CRL = 360
cs.SYSZ_INS_CS = 361
cs.SYSZ_INS_CSG = 362
cs.SYSZ_INS_CSY = 363
cs.SYSZ_INS_CXBR = 364
cs.SYSZ_INS_CXFBR = 365
cs.SYSZ_INS_CXGBR = 366
cs.SYSZ_INS_CXLFBR = 367
cs.SYSZ_INS_CXLGBR = 368
cs.SYSZ_INS_CY = 369
cs.SYSZ_INS_DDB = 370
cs.SYSZ_INS_DDBR = 371
cs.SYSZ_INS_DEB = 372
cs.SYSZ_INS_DEBR = 373
cs.SYSZ_INS_DL = 374
cs.SYSZ_INS_DLG = 375
cs.SYSZ_INS_DLGR = 376
cs.SYSZ_INS_DLR = 377
cs.SYSZ_INS_DSG = 378
cs.SYSZ_INS_DSGF = 379
cs.SYSZ_INS_DSGFR = 380
cs.SYSZ_INS_DSGR = 381
cs.SYSZ_INS_DXBR = 382
cs.SYSZ_INS_EAR = 383
cs.SYSZ_INS_FIDBR = 384
cs.SYSZ_INS_FIDBRA = 385
cs.SYSZ_INS_FIEBR = 386
cs.SYSZ_INS_FIEBRA = 387
cs.SYSZ_INS_FIXBR = 388
cs.SYSZ_INS_FIXBRA = 389
cs.SYSZ_INS_FLOGR = 390
cs.SYSZ_INS_IC = 391
cs.SYSZ_INS_ICY = 392
cs.SYSZ_INS_IIHF = 393
cs.SYSZ_INS_IIHH = 394
cs.SYSZ_INS_IIHL = 395
cs.SYSZ_INS_IILF = 396
cs.SYSZ_INS_IILH = 397
cs.SYSZ_INS_IILL = 398
cs.SYSZ_INS_IPM = 399
cs.SYSZ_INS_L = 400
cs.SYSZ_INS_LA = 401
cs.SYSZ_INS_LAA = 402
cs.SYSZ_INS_LAAG = 403
cs.SYSZ_INS_LAAL = 404
cs.SYSZ_INS_LAALG = 405
cs.SYSZ_INS_LAN = 406
cs.SYSZ_INS_LANG = 407
cs.SYSZ_INS_LAO = 408
cs.SYSZ_INS_LAOG = 409
cs.SYSZ_INS_LARL = 410
cs.SYSZ_INS_LAX = 411
cs.SYSZ_INS_LAXG = 412
cs.SYSZ_INS_LAY = 413
cs.SYSZ_INS_LB = 414
cs.SYSZ_INS_LBH = 415
cs.SYSZ_INS_LBR = 416
cs.SYSZ_INS_LCDBR = 417
cs.SYSZ_INS_LCEBR = 418
cs.SYSZ_INS_LCGFR = 419
cs.SYSZ_INS_LCGR = 420
cs.SYSZ_INS_LCR = 421
cs.SYSZ_INS_LCXBR = 422
cs.SYSZ_INS_LD = 423
cs.SYSZ_INS_LDEB = 424
cs.SYSZ_INS_LDEBR = 425
cs.SYSZ_INS_LDGR = 426
cs.SYSZ_INS_LDR = 427
cs.SYSZ_INS_LDXBR = 428
cs.SYSZ_INS_LDXBRA = 429
cs.SYSZ_INS_LDY = 430
cs.SYSZ_INS_LE = 431
cs.SYSZ_INS_LEDBR = 432
cs.SYSZ_INS_LEDBRA = 433
cs.SYSZ_INS_LER = 434
cs.SYSZ_INS_LEXBR = 435
cs.SYSZ_INS_LEXBRA = 436
cs.SYSZ_INS_LEY = 437
cs.SYSZ_INS_LFH = 438
cs.SYSZ_INS_LG = 439
cs.SYSZ_INS_LGB = 440
cs.SYSZ_INS_LGBR = 441
cs.SYSZ_INS_LGDR = 442
cs.SYSZ_INS_LGF = 443
cs.SYSZ_INS_LGFI = 444
cs.SYSZ_INS_LGFR = 445
cs.SYSZ_INS_LGFRL = 446
cs.SYSZ_INS_LGH = 447
cs.SYSZ_INS_LGHI = 448
cs.SYSZ_INS_LGHR = 449
cs.SYSZ_INS_LGHRL = 450
cs.SYSZ_INS_LGR = 451
cs.SYSZ_INS_LGRL = 452
cs.SYSZ_INS_LH = 453
cs.SYSZ_INS_LHH = 454
cs.SYSZ_INS_LHI = 455
cs.SYSZ_INS_LHR = 456
cs.SYSZ_INS_LHRL = 457
cs.SYSZ_INS_LHY = 458
cs.SYSZ_INS_LLC = 459
cs.SYSZ_INS_LLCH = 460
cs.SYSZ_INS_LLCR = 461
cs.SYSZ_INS_LLGC = 462
cs.SYSZ_INS_LLGCR = 463
cs.SYSZ_INS_LLGF = 464
cs.SYSZ_INS_LLGFR = 465
cs.SYSZ_INS_LLGFRL = 466
cs.SYSZ_INS_LLGH = 467
cs.SYSZ_INS_LLGHR = 468
cs.SYSZ_INS_LLGHRL = 469
cs.SYSZ_INS_LLH = 470
cs.SYSZ_INS_LLHH = 471
cs.SYSZ_INS_LLHR = 472
cs.SYSZ_INS_LLHRL = 473
cs.SYSZ_INS_LLIHF = 474
cs.SYSZ_INS_LLIHH = 475
cs.SYSZ_INS_LLIHL = 476
cs.SYSZ_INS_LLILF = 477
cs.SYSZ_INS_LLILH = 478
cs.SYSZ_INS_LLILL = 479
cs.SYSZ_INS_LMG = 480
cs.SYSZ_INS_LNDBR = 481
cs.SYSZ_INS_LNEBR = 482
cs.SYSZ_INS_LNGFR = 483
cs.SYSZ_INS_LNGR = 484
cs.SYSZ_INS_LNR = 485
cs.SYSZ_INS_LNXBR = 486
cs.SYSZ_INS_LPDBR = 487
cs.SYSZ_INS_LPEBR = 488
cs.SYSZ_INS_LPGFR = 489
cs.SYSZ_INS_LPGR = 490
cs.SYSZ_INS_LPR = 491
cs.SYSZ_INS_LPXBR = 492
cs.SYSZ_INS_LR = 493
cs.SYSZ_INS_LRL = 494
cs.SYSZ_INS_LRV = 495
cs.SYSZ_INS_LRVG = 496
cs.SYSZ_INS_LRVGR = 497
cs.SYSZ_INS_LRVR = 498
cs.SYSZ_INS_LT = 499
cs.SYSZ_INS_LTDBR = 500
cs.SYSZ_INS_LTEBR = 501
cs.SYSZ_INS_LTG = 502
cs.SYSZ_INS_LTGF = 503
cs.SYSZ_INS_LTGFR = 504
cs.SYSZ_INS_LTGR = 505
cs.SYSZ_INS_LTR = 506
cs.SYSZ_INS_LTXBR = 507
cs.SYSZ_INS_LXDB = 508
cs.SYSZ_INS_LXDBR = 509
cs.SYSZ_INS_LXEB = 510
cs.SYSZ_INS_LXEBR = 511
cs.SYSZ_INS_LXR = 512
cs.SYSZ_INS_LY = 513
cs.SYSZ_INS_LZDR = 514
cs.SYSZ_INS_LZER = 515
cs.SYSZ_INS_LZXR = 516
cs.SYSZ_INS_MADB = 517
cs.SYSZ_INS_MADBR = 518
cs.SYSZ_INS_MAEB = 519
cs.SYSZ_INS_MAEBR = 520
cs.SYSZ_INS_MDB = 521
cs.SYSZ_INS_MDBR = 522
cs.SYSZ_INS_MDEB = 523
cs.SYSZ_INS_MDEBR = 524
cs.SYSZ_INS_MEEB = 525
cs.SYSZ_INS_MEEBR = 526
cs.SYSZ_INS_MGHI = 527
cs.SYSZ_INS_MH = 528
cs.SYSZ_INS_MHI = 529
cs.SYSZ_INS_MHY = 530
cs.SYSZ_INS_MLG = 531
cs.SYSZ_INS_MLGR = 532
cs.SYSZ_INS_MS = 533
cs.SYSZ_INS_MSDB = 534
cs.SYSZ_INS_MSDBR = 535
cs.SYSZ_INS_MSEB = 536
cs.SYSZ_INS_MSEBR = 537
cs.SYSZ_INS_MSFI = 538
cs.SYSZ_INS_MSG = 539
cs.SYSZ_INS_MSGF = 540
cs.SYSZ_INS_MSGFI = 541
cs.SYSZ_INS_MSGFR = 542
cs.SYSZ_INS_MSGR = 543
cs.SYSZ_INS_MSR = 544
cs.SYSZ_INS_MSY = 545
cs.SYSZ_INS_MVC = 546
cs.SYSZ_INS_MVGHI = 547
cs.SYSZ_INS_MVHHI = 548
cs.SYSZ_INS_MVHI = 549
cs.SYSZ_INS_MVI = 550
cs.SYSZ_INS_MVIY = 551
cs.SYSZ_INS_MVST = 552
cs.SYSZ_INS_MXBR = 553
cs.SYSZ_INS_MXDB = 554
cs.SYSZ_INS_MXDBR = 555
cs.SYSZ_INS_N = 556
cs.SYSZ_INS_NC = 557
cs.SYSZ_INS_NG = 558
cs.SYSZ_INS_NGR = 559
cs.SYSZ_INS_NGRK = 560
cs.SYSZ_INS_NI = 561
cs.SYSZ_INS_NIHF = 562
cs.SYSZ_INS_NIHH = 563
cs.SYSZ_INS_NIHL = 564
cs.SYSZ_INS_NILF = 565
cs.SYSZ_INS_NILH = 566
cs.SYSZ_INS_NILL = 567
cs.SYSZ_INS_NIY = 568
cs.SYSZ_INS_NR = 569
cs.SYSZ_INS_NRK = 570
cs.SYSZ_INS_NY = 571
cs.SYSZ_INS_O = 572
cs.SYSZ_INS_OC = 573
cs.SYSZ_INS_OG = 574
cs.SYSZ_INS_OGR = 575
cs.SYSZ_INS_OGRK = 576
cs.SYSZ_INS_OI = 577
cs.SYSZ_INS_OIHF = 578
cs.SYSZ_INS_OIHH = 579
cs.SYSZ_INS_OIHL = 580
cs.SYSZ_INS_OILF = 581
cs.SYSZ_INS_OILH = 582
cs.SYSZ_INS_OILL = 583
cs.SYSZ_INS_OIY = 584
cs.SYSZ_INS_OR = 585
cs.SYSZ_INS_ORK = 586
cs.SYSZ_INS_OY = 587
cs.SYSZ_INS_PFD = 588
cs.SYSZ_INS_PFDRL = 589
cs.SYSZ_INS_RISBG = 590
cs.SYSZ_INS_RISBHG = 591
cs.SYSZ_INS_RISBLG = 592
cs.SYSZ_INS_RLL = 593
cs.SYSZ_INS_RLLG = 594
cs.SYSZ_INS_RNSBG = 595
cs.SYSZ_INS_ROSBG = 596
cs.SYSZ_INS_RXSBG = 597
cs.SYSZ_INS_S = 598
cs.SYSZ_INS_SDB = 599
cs.SYSZ_INS_SDBR = 600
cs.SYSZ_INS_SEB = 601
cs.SYSZ_INS_SEBR = 602
cs.SYSZ_INS_SG = 603
cs.SYSZ_INS_SGF = 604
cs.SYSZ_INS_SGFR = 605
cs.SYSZ_INS_SGR = 606
cs.SYSZ_INS_SGRK = 607
cs.SYSZ_INS_SH = 608
cs.SYSZ_INS_SHY = 609
cs.SYSZ_INS_SL = 610
cs.SYSZ_INS_SLB = 611
cs.SYSZ_INS_SLBG = 612
cs.SYSZ_INS_SLBR = 613
cs.SYSZ_INS_SLFI = 614
cs.SYSZ_INS_SLG = 615
cs.SYSZ_INS_SLBGR = 616
cs.SYSZ_INS_SLGF = 617
cs.SYSZ_INS_SLGFI = 618
cs.SYSZ_INS_SLGFR = 619
cs.SYSZ_INS_SLGR = 620
cs.SYSZ_INS_SLGRK = 621
cs.SYSZ_INS_SLL = 622
cs.SYSZ_INS_SLLG = 623
cs.SYSZ_INS_SLLK = 624
cs.SYSZ_INS_SLR = 625
cs.SYSZ_INS_SLRK = 626
cs.SYSZ_INS_SLY = 627
cs.SYSZ_INS_SQDB = 628
cs.SYSZ_INS_SQDBR = 629
cs.SYSZ_INS_SQEB = 630
cs.SYSZ_INS_SQEBR = 631
cs.SYSZ_INS_SQXBR = 632
cs.SYSZ_INS_SR = 633
cs.SYSZ_INS_SRA = 634
cs.SYSZ_INS_SRAG = 635
cs.SYSZ_INS_SRAK = 636
cs.SYSZ_INS_SRK = 637
cs.SYSZ_INS_SRL = 638
cs.SYSZ_INS_SRLG = 639
cs.SYSZ_INS_SRLK = 640
cs.SYSZ_INS_SRST = 641
cs.SYSZ_INS_ST = 642
cs.SYSZ_INS_STC = 643
cs.SYSZ_INS_STCH = 644
cs.SYSZ_INS_STCY = 645
cs.SYSZ_INS_STD = 646
cs.SYSZ_INS_STDY = 647
cs.SYSZ_INS_STE = 648
cs.SYSZ_INS_STEY = 649
cs.SYSZ_INS_STFH = 650
cs.SYSZ_INS_STG = 651
cs.SYSZ_INS_STGRL = 652
cs.SYSZ_INS_STH = 653
cs.SYSZ_INS_STHH = 654
cs.SYSZ_INS_STHRL = 655
cs.SYSZ_INS_STHY = 656
cs.SYSZ_INS_STMG = 657
cs.SYSZ_INS_STRL = 658
cs.SYSZ_INS_STRV = 659
cs.SYSZ_INS_STRVG = 660
cs.SYSZ_INS_STY = 661
cs.SYSZ_INS_SXBR = 662
cs.SYSZ_INS_SY = 663
cs.SYSZ_INS_TM = 664
cs.SYSZ_INS_TMHH = 665
cs.SYSZ_INS_TMHL = 666
cs.SYSZ_INS_TMLH = 667
cs.SYSZ_INS_TMLL = 668
cs.SYSZ_INS_TMY = 669
cs.SYSZ_INS_X = 670
cs.SYSZ_INS_XC = 671
cs.SYSZ_INS_XG = 672
cs.SYSZ_INS_XGR = 673
cs.SYSZ_INS_XGRK = 674
cs.SYSZ_INS_XI = 675
cs.SYSZ_INS_XIHF = 676
cs.SYSZ_INS_XILF = 677
cs.SYSZ_INS_XIY = 678
cs.SYSZ_INS_XR = 679
cs.SYSZ_INS_XRK = 680
cs.SYSZ_INS_XY = 681
cs.SYSZ_INS_ENDING = 682
// Group of SystemZ instructions
cs.SYSZ_GRP_INVALID = 0
// Generic groups
cs.SYSZ_GRP_JUMP = 1
// Architecture-specific groups
cs.SYSZ_GRP_DISTINCTOPS = 128
cs.SYSZ_GRP_FPEXTENSION = 129
cs.SYSZ_GRP_HIGHWORD = 130
cs.SYSZ_GRP_INTERLOCKEDACCESS1 = 131
cs.SYSZ_GRP_LOADSTOREONCOND = 132
cs.SYSZ_GRP_ENDING = 133
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [x86_const.py]
// X86 registers
cs.X86_REG_INVALID = 0
cs.X86_REG_AH = 1
cs.X86_REG_AL = 2
cs.X86_REG_AX = 3
cs.X86_REG_BH = 4
cs.X86_REG_BL = 5
cs.X86_REG_BP = 6
cs.X86_REG_BPL = 7
cs.X86_REG_BX = 8
cs.X86_REG_CH = 9
cs.X86_REG_CL = 10
cs.X86_REG_CS = 11
cs.X86_REG_CX = 12
cs.X86_REG_DH = 13
cs.X86_REG_DI = 14
cs.X86_REG_DIL = 15
cs.X86_REG_DL = 16
cs.X86_REG_DS = 17
cs.X86_REG_DX = 18
cs.X86_REG_EAX = 19
cs.X86_REG_EBP = 20
cs.X86_REG_EBX = 21
cs.X86_REG_ECX = 22
cs.X86_REG_EDI = 23
cs.X86_REG_EDX = 24
cs.X86_REG_EFLAGS = 25
cs.X86_REG_EIP = 26
cs.X86_REG_EIZ = 27
cs.X86_REG_ES = 28
cs.X86_REG_ESI = 29
cs.X86_REG_ESP = 30
cs.X86_REG_FPSW = 31
cs.X86_REG_FS = 32
cs.X86_REG_GS = 33
cs.X86_REG_IP = 34
cs.X86_REG_RAX = 35
cs.X86_REG_RBP = 36
cs.X86_REG_RBX = 37
cs.X86_REG_RCX = 38
cs.X86_REG_RDI = 39
cs.X86_REG_RDX = 40
cs.X86_REG_RIP = 41
cs.X86_REG_RIZ = 42
cs.X86_REG_RSI = 43
cs.X86_REG_RSP = 44
cs.X86_REG_SI = 45
cs.X86_REG_SIL = 46
cs.X86_REG_SP = 47
cs.X86_REG_SPL = 48
cs.X86_REG_SS = 49
cs.X86_REG_CR0 = 50
cs.X86_REG_CR1 = 51
cs.X86_REG_CR2 = 52
cs.X86_REG_CR3 = 53
cs.X86_REG_CR4 = 54
cs.X86_REG_CR5 = 55
cs.X86_REG_CR6 = 56
cs.X86_REG_CR7 = 57
cs.X86_REG_CR8 = 58
cs.X86_REG_CR9 = 59
cs.X86_REG_CR10 = 60
cs.X86_REG_CR11 = 61
cs.X86_REG_CR12 = 62
cs.X86_REG_CR13 = 63
cs.X86_REG_CR14 = 64
cs.X86_REG_CR15 = 65
cs.X86_REG_DR0 = 66
cs.X86_REG_DR1 = 67
cs.X86_REG_DR2 = 68
cs.X86_REG_DR3 = 69
cs.X86_REG_DR4 = 70
cs.X86_REG_DR5 = 71
cs.X86_REG_DR6 = 72
cs.X86_REG_DR7 = 73
cs.X86_REG_FP0 = 74
cs.X86_REG_FP1 = 75
cs.X86_REG_FP2 = 76
cs.X86_REG_FP3 = 77
cs.X86_REG_FP4 = 78
cs.X86_REG_FP5 = 79
cs.X86_REG_FP6 = 80
cs.X86_REG_FP7 = 81
cs.X86_REG_K0 = 82
cs.X86_REG_K1 = 83
cs.X86_REG_K2 = 84
cs.X86_REG_K3 = 85
cs.X86_REG_K4 = 86
cs.X86_REG_K5 = 87
cs.X86_REG_K6 = 88
cs.X86_REG_K7 = 89
cs.X86_REG_MM0 = 90
cs.X86_REG_MM1 = 91
cs.X86_REG_MM2 = 92
cs.X86_REG_MM3 = 93
cs.X86_REG_MM4 = 94
cs.X86_REG_MM5 = 95
cs.X86_REG_MM6 = 96
cs.X86_REG_MM7 = 97
cs.X86_REG_R8 = 98
cs.X86_REG_R9 = 99
cs.X86_REG_R10 = 100
cs.X86_REG_R11 = 101
cs.X86_REG_R12 = 102
cs.X86_REG_R13 = 103
cs.X86_REG_R14 = 104
cs.X86_REG_R15 = 105
cs.X86_REG_ST0 = 106
cs.X86_REG_ST1 = 107
cs.X86_REG_ST2 = 108
cs.X86_REG_ST3 = 109
cs.X86_REG_ST4 = 110
cs.X86_REG_ST5 = 111
cs.X86_REG_ST6 = 112
cs.X86_REG_ST7 = 113
cs.X86_REG_XMM0 = 114
cs.X86_REG_XMM1 = 115
cs.X86_REG_XMM2 = 116
cs.X86_REG_XMM3 = 117
cs.X86_REG_XMM4 = 118
cs.X86_REG_XMM5 = 119
cs.X86_REG_XMM6 = 120
cs.X86_REG_XMM7 = 121
cs.X86_REG_XMM8 = 122
cs.X86_REG_XMM9 = 123
cs.X86_REG_XMM10 = 124
cs.X86_REG_XMM11 = 125
cs.X86_REG_XMM12 = 126
cs.X86_REG_XMM13 = 127
cs.X86_REG_XMM14 = 128
cs.X86_REG_XMM15 = 129
cs.X86_REG_XMM16 = 130
cs.X86_REG_XMM17 = 131
cs.X86_REG_XMM18 = 132
cs.X86_REG_XMM19 = 133
cs.X86_REG_XMM20 = 134
cs.X86_REG_XMM21 = 135
cs.X86_REG_XMM22 = 136
cs.X86_REG_XMM23 = 137
cs.X86_REG_XMM24 = 138
cs.X86_REG_XMM25 = 139
cs.X86_REG_XMM26 = 140
cs.X86_REG_XMM27 = 141
cs.X86_REG_XMM28 = 142
cs.X86_REG_XMM29 = 143
cs.X86_REG_XMM30 = 144
cs.X86_REG_XMM31 = 145
cs.X86_REG_YMM0 = 146
cs.X86_REG_YMM1 = 147
cs.X86_REG_YMM2 = 148
cs.X86_REG_YMM3 = 149
cs.X86_REG_YMM4 = 150
cs.X86_REG_YMM5 = 151
cs.X86_REG_YMM6 = 152
cs.X86_REG_YMM7 = 153
cs.X86_REG_YMM8 = 154
cs.X86_REG_YMM9 = 155
cs.X86_REG_YMM10 = 156
cs.X86_REG_YMM11 = 157
cs.X86_REG_YMM12 = 158
cs.X86_REG_YMM13 = 159
cs.X86_REG_YMM14 = 160
cs.X86_REG_YMM15 = 161
cs.X86_REG_YMM16 = 162
cs.X86_REG_YMM17 = 163
cs.X86_REG_YMM18 = 164
cs.X86_REG_YMM19 = 165
cs.X86_REG_YMM20 = 166
cs.X86_REG_YMM21 = 167
cs.X86_REG_YMM22 = 168
cs.X86_REG_YMM23 = 169
cs.X86_REG_YMM24 = 170
cs.X86_REG_YMM25 = 171
cs.X86_REG_YMM26 = 172
cs.X86_REG_YMM27 = 173
cs.X86_REG_YMM28 = 174
cs.X86_REG_YMM29 = 175
cs.X86_REG_YMM30 = 176
cs.X86_REG_YMM31 = 177
cs.X86_REG_ZMM0 = 178
cs.X86_REG_ZMM1 = 179
cs.X86_REG_ZMM2 = 180
cs.X86_REG_ZMM3 = 181
cs.X86_REG_ZMM4 = 182
cs.X86_REG_ZMM5 = 183
cs.X86_REG_ZMM6 = 184
cs.X86_REG_ZMM7 = 185
cs.X86_REG_ZMM8 = 186
cs.X86_REG_ZMM9 = 187
cs.X86_REG_ZMM10 = 188
cs.X86_REG_ZMM11 = 189
cs.X86_REG_ZMM12 = 190
cs.X86_REG_ZMM13 = 191
cs.X86_REG_ZMM14 = 192
cs.X86_REG_ZMM15 = 193
cs.X86_REG_ZMM16 = 194
cs.X86_REG_ZMM17 = 195
cs.X86_REG_ZMM18 = 196
cs.X86_REG_ZMM19 = 197
cs.X86_REG_ZMM20 = 198
cs.X86_REG_ZMM21 = 199
cs.X86_REG_ZMM22 = 200
cs.X86_REG_ZMM23 = 201
cs.X86_REG_ZMM24 = 202
cs.X86_REG_ZMM25 = 203
cs.X86_REG_ZMM26 = 204
cs.X86_REG_ZMM27 = 205
cs.X86_REG_ZMM28 = 206
cs.X86_REG_ZMM29 = 207
cs.X86_REG_ZMM30 = 208
cs.X86_REG_ZMM31 = 209
cs.X86_REG_R8B = 210
cs.X86_REG_R9B = 211
cs.X86_REG_R10B = 212
cs.X86_REG_R11B = 213
cs.X86_REG_R12B = 214
cs.X86_REG_R13B = 215
cs.X86_REG_R14B = 216
cs.X86_REG_R15B = 217
cs.X86_REG_R8D = 218
cs.X86_REG_R9D = 219
cs.X86_REG_R10D = 220
cs.X86_REG_R11D = 221
cs.X86_REG_R12D = 222
cs.X86_REG_R13D = 223
cs.X86_REG_R14D = 224
cs.X86_REG_R15D = 225
cs.X86_REG_R8W = 226
cs.X86_REG_R9W = 227
cs.X86_REG_R10W = 228
cs.X86_REG_R11W = 229
cs.X86_REG_R12W = 230
cs.X86_REG_R13W = 231
cs.X86_REG_R14W = 232
cs.X86_REG_R15W = 233
cs.X86_REG_ENDING = 234
// Operand type for instruction's operands
cs.X86_OP_INVALID = 0
cs.X86_OP_REG = 1
cs.X86_OP_IMM = 2
cs.X86_OP_MEM = 3
cs.X86_OP_FP = 4
// AVX broadcast type
cs.X86_AVX_BCAST_INVALID = 0
cs.X86_AVX_BCAST_2 = 1
cs.X86_AVX_BCAST_4 = 2
cs.X86_AVX_BCAST_8 = 3
cs.X86_AVX_BCAST_16 = 4
// SSE Code Condition type
cs.X86_SSE_CC_INVALID = 0
cs.X86_SSE_CC_EQ = 1
cs.X86_SSE_CC_LT = 2
cs.X86_SSE_CC_LE = 3
cs.X86_SSE_CC_UNORD = 4
cs.X86_SSE_CC_NEQ = 5
cs.X86_SSE_CC_NLT = 6
cs.X86_SSE_CC_NLE = 7
cs.X86_SSE_CC_ORD = 8
cs.X86_SSE_CC_EQ_UQ = 9
cs.X86_SSE_CC_NGE = 10
cs.X86_SSE_CC_NGT = 11
cs.X86_SSE_CC_FALSE = 12
cs.X86_SSE_CC_NEQ_OQ = 13
cs.X86_SSE_CC_GE = 14
cs.X86_SSE_CC_GT = 15
cs.X86_SSE_CC_TRUE = 16
// AVX Code Condition type
cs.X86_AVX_CC_INVALID = 0
cs.X86_AVX_CC_EQ = 1
cs.X86_AVX_CC_LT = 2
cs.X86_AVX_CC_LE = 3
cs.X86_AVX_CC_UNORD = 4
cs.X86_AVX_CC_NEQ = 5
cs.X86_AVX_CC_NLT = 6
cs.X86_AVX_CC_NLE = 7
cs.X86_AVX_CC_ORD = 8
cs.X86_AVX_CC_EQ_UQ = 9
cs.X86_AVX_CC_NGE = 10
cs.X86_AVX_CC_NGT = 11
cs.X86_AVX_CC_FALSE = 12
cs.X86_AVX_CC_NEQ_OQ = 13
cs.X86_AVX_CC_GE = 14
cs.X86_AVX_CC_GT = 15
cs.X86_AVX_CC_TRUE = 16
cs.X86_AVX_CC_EQ_OS = 17
cs.X86_AVX_CC_LT_OQ = 18
cs.X86_AVX_CC_LE_OQ = 19
cs.X86_AVX_CC_UNORD_S = 20
cs.X86_AVX_CC_NEQ_US = 21
cs.X86_AVX_CC_NLT_UQ = 22
cs.X86_AVX_CC_NLE_UQ = 23
cs.X86_AVX_CC_ORD_S = 24
cs.X86_AVX_CC_EQ_US = 25
cs.X86_AVX_CC_NGE_UQ = 26
cs.X86_AVX_CC_NGT_UQ = 27
cs.X86_AVX_CC_FALSE_OS = 28
cs.X86_AVX_CC_NEQ_OS = 29
cs.X86_AVX_CC_GE_OQ = 30
cs.X86_AVX_CC_GT_OQ = 31
cs.X86_AVX_CC_TRUE_US = 32
// AVX static rounding mode type
cs.X86_AVX_RM_INVALID = 0
cs.X86_AVX_RM_RN = 1
cs.X86_AVX_RM_RD = 2
cs.X86_AVX_RM_RU = 3
cs.X86_AVX_RM_RZ = 4
// Instruction prefixes - to be used in cs_x86.prefix[]
cs.X86_PREFIX_LOCK = 0xf0
cs.X86_PREFIX_REP = 0xf3
cs.X86_PREFIX_REPNE = 0xf2
cs.X86_PREFIX_CS = 0x2e
cs.X86_PREFIX_SS = 0x36
cs.X86_PREFIX_DS = 0x3e
cs.X86_PREFIX_ES = 0x26
cs.X86_PREFIX_FS = 0x64
cs.X86_PREFIX_GS = 0x65
cs.X86_PREFIX_OPSIZE = 0x66
cs.X86_PREFIX_ADDRSIZE = 0x67
// X86 instructions
cs.X86_INS_INVALID = 0
cs.X86_INS_AAA = 1
cs.X86_INS_AAD = 2
cs.X86_INS_AAM = 3
cs.X86_INS_AAS = 4
cs.X86_INS_FABS = 5
cs.X86_INS_ADC = 6
cs.X86_INS_ADCX = 7
cs.X86_INS_ADD = 8
cs.X86_INS_ADDPD = 9
cs.X86_INS_ADDPS = 10
cs.X86_INS_ADDSD = 11
cs.X86_INS_ADDSS = 12
cs.X86_INS_ADDSUBPD = 13
cs.X86_INS_ADDSUBPS = 14
cs.X86_INS_FADD = 15
cs.X86_INS_FIADD = 16
cs.X86_INS_FADDP = 17
cs.X86_INS_ADOX = 18
cs.X86_INS_AESDECLAST = 19
cs.X86_INS_AESDEC = 20
cs.X86_INS_AESENCLAST = 21
cs.X86_INS_AESENC = 22
cs.X86_INS_AESIMC = 23
cs.X86_INS_AESKEYGENASSIST = 24
cs.X86_INS_AND = 25
cs.X86_INS_ANDN = 26
cs.X86_INS_ANDNPD = 27
cs.X86_INS_ANDNPS = 28
cs.X86_INS_ANDPD = 29
cs.X86_INS_ANDPS = 30
cs.X86_INS_ARPL = 31
cs.X86_INS_BEXTR = 32
cs.X86_INS_BLCFILL = 33
cs.X86_INS_BLCI = 34
cs.X86_INS_BLCIC = 35
cs.X86_INS_BLCMSK = 36
cs.X86_INS_BLCS = 37
cs.X86_INS_BLENDPD = 38
cs.X86_INS_BLENDPS = 39
cs.X86_INS_BLENDVPD = 40
cs.X86_INS_BLENDVPS = 41
cs.X86_INS_BLSFILL = 42
cs.X86_INS_BLSI = 43
cs.X86_INS_BLSIC = 44
cs.X86_INS_BLSMSK = 45
cs.X86_INS_BLSR = 46
cs.X86_INS_BOUND = 47
cs.X86_INS_BSF = 48
cs.X86_INS_BSR = 49
cs.X86_INS_BSWAP = 50
cs.X86_INS_BT = 51
cs.X86_INS_BTC = 52
cs.X86_INS_BTR = 53
cs.X86_INS_BTS = 54
cs.X86_INS_BZHI = 55
cs.X86_INS_CALL = 56
cs.X86_INS_CBW = 57
cs.X86_INS_CDQ = 58
cs.X86_INS_CDQE = 59
cs.X86_INS_FCHS = 60
cs.X86_INS_CLAC = 61
cs.X86_INS_CLC = 62
cs.X86_INS_CLD = 63
cs.X86_INS_CLFLUSH = 64
cs.X86_INS_CLGI = 65
cs.X86_INS_CLI = 66
cs.X86_INS_CLTS = 67
cs.X86_INS_CMC = 68
cs.X86_INS_CMOVA = 69
cs.X86_INS_CMOVAE = 70
cs.X86_INS_CMOVB = 71
cs.X86_INS_CMOVBE = 72
cs.X86_INS_FCMOVBE = 73
cs.X86_INS_FCMOVB = 74
cs.X86_INS_CMOVE = 75
cs.X86_INS_FCMOVE = 76
cs.X86_INS_CMOVG = 77
cs.X86_INS_CMOVGE = 78
cs.X86_INS_CMOVL = 79
cs.X86_INS_CMOVLE = 80
cs.X86_INS_FCMOVNBE = 81
cs.X86_INS_FCMOVNB = 82
cs.X86_INS_CMOVNE = 83
cs.X86_INS_FCMOVNE = 84
cs.X86_INS_CMOVNO = 85
cs.X86_INS_CMOVNP = 86
cs.X86_INS_FCMOVNU = 87
cs.X86_INS_CMOVNS = 88
cs.X86_INS_CMOVO = 89
cs.X86_INS_CMOVP = 90
cs.X86_INS_FCMOVU = 91
cs.X86_INS_CMOVS = 92
cs.X86_INS_CMP = 93
cs.X86_INS_CMPPD = 94
cs.X86_INS_CMPPS = 95
cs.X86_INS_CMPSB = 96
cs.X86_INS_CMPSD = 97
cs.X86_INS_CMPSQ = 98
cs.X86_INS_CMPSS = 99
cs.X86_INS_CMPSW = 100
cs.X86_INS_CMPXCHG16B = 101
cs.X86_INS_CMPXCHG = 102
cs.X86_INS_CMPXCHG8B = 103
cs.X86_INS_COMISD = 104
cs.X86_INS_COMISS = 105
cs.X86_INS_FCOMP = 106
cs.X86_INS_FCOMPI = 107
cs.X86_INS_FCOMI = 108
cs.X86_INS_FCOM = 109
cs.X86_INS_FCOS = 110
cs.X86_INS_CPUID = 111
cs.X86_INS_CQO = 112
cs.X86_INS_CRC32 = 113
cs.X86_INS_CVTDQ2PD = 114
cs.X86_INS_CVTDQ2PS = 115
cs.X86_INS_CVTPD2DQ = 116
cs.X86_INS_CVTPD2PS = 117
cs.X86_INS_CVTPS2DQ = 118
cs.X86_INS_CVTPS2PD = 119
cs.X86_INS_CVTSD2SI = 120
cs.X86_INS_CVTSD2SS = 121
cs.X86_INS_CVTSI2SD = 122
cs.X86_INS_CVTSI2SS = 123
cs.X86_INS_CVTSS2SD = 124
cs.X86_INS_CVTSS2SI = 125
cs.X86_INS_CVTTPD2DQ = 126
cs.X86_INS_CVTTPS2DQ = 127
cs.X86_INS_CVTTSD2SI = 128
cs.X86_INS_CVTTSS2SI = 129
cs.X86_INS_CWD = 130
cs.X86_INS_CWDE = 131
cs.X86_INS_DAA = 132
cs.X86_INS_DAS = 133
cs.X86_INS_DATA16 = 134
cs.X86_INS_DEC = 135
cs.X86_INS_DIV = 136
cs.X86_INS_DIVPD = 137
cs.X86_INS_DIVPS = 138
cs.X86_INS_FDIVR = 139
cs.X86_INS_FIDIVR = 140
cs.X86_INS_FDIVRP = 141
cs.X86_INS_DIVSD = 142
cs.X86_INS_DIVSS = 143
cs.X86_INS_FDIV = 144
cs.X86_INS_FIDIV = 145
cs.X86_INS_FDIVP = 146
cs.X86_INS_DPPD = 147
cs.X86_INS_DPPS = 148
cs.X86_INS_RET = 149
cs.X86_INS_ENCLS = 150
cs.X86_INS_ENCLU = 151
cs.X86_INS_ENTER = 152
cs.X86_INS_EXTRACTPS = 153
cs.X86_INS_EXTRQ = 154
cs.X86_INS_F2XM1 = 155
cs.X86_INS_LCALL = 156
cs.X86_INS_LJMP = 157
cs.X86_INS_FBLD = 158
cs.X86_INS_FBSTP = 159
cs.X86_INS_FCOMPP = 160
cs.X86_INS_FDECSTP = 161
cs.X86_INS_FEMMS = 162
cs.X86_INS_FFREE = 163
cs.X86_INS_FICOM = 164
cs.X86_INS_FICOMP = 165
cs.X86_INS_FINCSTP = 166
cs.X86_INS_FLDCW = 167
cs.X86_INS_FLDENV = 168
cs.X86_INS_FLDL2E = 169
cs.X86_INS_FLDL2T = 170
cs.X86_INS_FLDLG2 = 171
cs.X86_INS_FLDLN2 = 172
cs.X86_INS_FLDPI = 173
cs.X86_INS_FNCLEX = 174
cs.X86_INS_FNINIT = 175
cs.X86_INS_FNOP = 176
cs.X86_INS_FNSTCW = 177
cs.X86_INS_FNSTSW = 178
cs.X86_INS_FPATAN = 179
cs.X86_INS_FPREM = 180
cs.X86_INS_FPREM1 = 181
cs.X86_INS_FPTAN = 182
cs.X86_INS_FRNDINT = 183
cs.X86_INS_FRSTOR = 184
cs.X86_INS_FNSAVE = 185
cs.X86_INS_FSCALE = 186
cs.X86_INS_FSETPM = 187
cs.X86_INS_FSINCOS = 188
cs.X86_INS_FNSTENV = 189
cs.X86_INS_FXAM = 190
cs.X86_INS_FXRSTOR = 191
cs.X86_INS_FXRSTOR64 = 192
cs.X86_INS_FXSAVE = 193
cs.X86_INS_FXSAVE64 = 194
cs.X86_INS_FXTRACT = 195
cs.X86_INS_FYL2X = 196
cs.X86_INS_FYL2XP1 = 197
cs.X86_INS_MOVAPD = 198
cs.X86_INS_MOVAPS = 199
cs.X86_INS_ORPD = 200
cs.X86_INS_ORPS = 201
cs.X86_INS_VMOVAPD = 202
cs.X86_INS_VMOVAPS = 203
cs.X86_INS_XORPD = 204
cs.X86_INS_XORPS = 205
cs.X86_INS_GETSEC = 206
cs.X86_INS_HADDPD = 207
cs.X86_INS_HADDPS = 208
cs.X86_INS_HLT = 209
cs.X86_INS_HSUBPD = 210
cs.X86_INS_HSUBPS = 211
cs.X86_INS_IDIV = 212
cs.X86_INS_FILD = 213
cs.X86_INS_IMUL = 214
cs.X86_INS_IN = 215
cs.X86_INS_INC = 216
cs.X86_INS_INSB = 217
cs.X86_INS_INSERTPS = 218
cs.X86_INS_INSERTQ = 219
cs.X86_INS_INSD = 220
cs.X86_INS_INSW = 221
cs.X86_INS_INT = 222
cs.X86_INS_INT1 = 223
cs.X86_INS_INT3 = 224
cs.X86_INS_INTO = 225
cs.X86_INS_INVD = 226
cs.X86_INS_INVEPT = 227
cs.X86_INS_INVLPG = 228
cs.X86_INS_INVLPGA = 229
cs.X86_INS_INVPCID = 230
cs.X86_INS_INVVPID = 231
cs.X86_INS_IRET = 232
cs.X86_INS_IRETD = 233
cs.X86_INS_IRETQ = 234
cs.X86_INS_FISTTP = 235
cs.X86_INS_FIST = 236
cs.X86_INS_FISTP = 237
cs.X86_INS_UCOMISD = 238
cs.X86_INS_UCOMISS = 239
cs.X86_INS_VCMP = 240
cs.X86_INS_VCOMISD = 241
cs.X86_INS_VCOMISS = 242
cs.X86_INS_VCVTSD2SS = 243
cs.X86_INS_VCVTSI2SD = 244
cs.X86_INS_VCVTSI2SS = 245
cs.X86_INS_VCVTSS2SD = 246
cs.X86_INS_VCVTTSD2SI = 247
cs.X86_INS_VCVTTSD2USI = 248
cs.X86_INS_VCVTTSS2SI = 249
cs.X86_INS_VCVTTSS2USI = 250
cs.X86_INS_VCVTUSI2SD = 251
cs.X86_INS_VCVTUSI2SS = 252
cs.X86_INS_VUCOMISD = 253
cs.X86_INS_VUCOMISS = 254
cs.X86_INS_JAE = 255
cs.X86_INS_JA = 256
cs.X86_INS_JBE = 257
cs.X86_INS_JB = 258
cs.X86_INS_JCXZ = 259
cs.X86_INS_JECXZ = 260
cs.X86_INS_JE = 261
cs.X86_INS_JGE = 262
cs.X86_INS_JG = 263
cs.X86_INS_JLE = 264
cs.X86_INS_JL = 265
cs.X86_INS_JMP = 266
cs.X86_INS_JNE = 267
cs.X86_INS_JNO = 268
cs.X86_INS_JNP = 269
cs.X86_INS_JNS = 270
cs.X86_INS_JO = 271
cs.X86_INS_JP = 272
cs.X86_INS_JRCXZ = 273
cs.X86_INS_JS = 274
cs.X86_INS_KANDB = 275
cs.X86_INS_KANDD = 276
cs.X86_INS_KANDNB = 277
cs.X86_INS_KANDND = 278
cs.X86_INS_KANDNQ = 279
cs.X86_INS_KANDNW = 280
cs.X86_INS_KANDQ = 281
cs.X86_INS_KANDW = 282
cs.X86_INS_KMOVB = 283
cs.X86_INS_KMOVD = 284
cs.X86_INS_KMOVQ = 285
cs.X86_INS_KMOVW = 286
cs.X86_INS_KNOTB = 287
cs.X86_INS_KNOTD = 288
cs.X86_INS_KNOTQ = 289
cs.X86_INS_KNOTW = 290
cs.X86_INS_KORB = 291
cs.X86_INS_KORD = 292
cs.X86_INS_KORQ = 293
cs.X86_INS_KORTESTW = 294
cs.X86_INS_KORW = 295
cs.X86_INS_KSHIFTLW = 296
cs.X86_INS_KSHIFTRW = 297
cs.X86_INS_KUNPCKBW = 298
cs.X86_INS_KXNORB = 299
cs.X86_INS_KXNORD = 300
cs.X86_INS_KXNORQ = 301
cs.X86_INS_KXNORW = 302
cs.X86_INS_KXORB = 303
cs.X86_INS_KXORD = 304
cs.X86_INS_KXORQ = 305
cs.X86_INS_KXORW = 306
cs.X86_INS_LAHF = 307
cs.X86_INS_LAR = 308
cs.X86_INS_LDDQU = 309
cs.X86_INS_LDMXCSR = 310
cs.X86_INS_LDS = 311
cs.X86_INS_FLDZ = 312
cs.X86_INS_FLD1 = 313
cs.X86_INS_FLD = 314
cs.X86_INS_LEA = 315
cs.X86_INS_LEAVE = 316
cs.X86_INS_LES = 317
cs.X86_INS_LFENCE = 318
cs.X86_INS_LFS = 319
cs.X86_INS_LGDT = 320
cs.X86_INS_LGS = 321
cs.X86_INS_LIDT = 322
cs.X86_INS_LLDT = 323
cs.X86_INS_LMSW = 324
cs.X86_INS_OR = 325
cs.X86_INS_SUB = 326
cs.X86_INS_XOR = 327
cs.X86_INS_LODSB = 328
cs.X86_INS_LODSD = 329
cs.X86_INS_LODSQ = 330
cs.X86_INS_LODSW = 331
cs.X86_INS_LOOP = 332
cs.X86_INS_LOOPE = 333
cs.X86_INS_LOOPNE = 334
cs.X86_INS_RETF = 335
cs.X86_INS_RETFQ = 336
cs.X86_INS_LSL = 337
cs.X86_INS_LSS = 338
cs.X86_INS_LTR = 339
cs.X86_INS_XADD = 340
cs.X86_INS_LZCNT = 341
cs.X86_INS_MASKMOVDQU = 342
cs.X86_INS_MAXPD = 343
cs.X86_INS_MAXPS = 344
cs.X86_INS_MAXSD = 345
cs.X86_INS_MAXSS = 346
cs.X86_INS_MFENCE = 347
cs.X86_INS_MINPD = 348
cs.X86_INS_MINPS = 349
cs.X86_INS_MINSD = 350
cs.X86_INS_MINSS = 351
cs.X86_INS_CVTPD2PI = 352
cs.X86_INS_CVTPI2PD = 353
cs.X86_INS_CVTPI2PS = 354
cs.X86_INS_CVTPS2PI = 355
cs.X86_INS_CVTTPD2PI = 356
cs.X86_INS_CVTTPS2PI = 357
cs.X86_INS_EMMS = 358
cs.X86_INS_MASKMOVQ = 359
cs.X86_INS_MOVD = 360
cs.X86_INS_MOVDQ2Q = 361
cs.X86_INS_MOVNTQ = 362
cs.X86_INS_MOVQ2DQ = 363
cs.X86_INS_MOVQ = 364
cs.X86_INS_PABSB = 365
cs.X86_INS_PABSD = 366
cs.X86_INS_PABSW = 367
cs.X86_INS_PACKSSDW = 368
cs.X86_INS_PACKSSWB = 369
cs.X86_INS_PACKUSWB = 370
cs.X86_INS_PADDB = 371
cs.X86_INS_PADDD = 372
cs.X86_INS_PADDQ = 373
cs.X86_INS_PADDSB = 374
cs.X86_INS_PADDSW = 375
cs.X86_INS_PADDUSB = 376
cs.X86_INS_PADDUSW = 377
cs.X86_INS_PADDW = 378
cs.X86_INS_PALIGNR = 379
cs.X86_INS_PANDN = 380
cs.X86_INS_PAND = 381
cs.X86_INS_PAVGB = 382
cs.X86_INS_PAVGW = 383
cs.X86_INS_PCMPEQB = 384
cs.X86_INS_PCMPEQD = 385
cs.X86_INS_PCMPEQW = 386
cs.X86_INS_PCMPGTB = 387
cs.X86_INS_PCMPGTD = 388
cs.X86_INS_PCMPGTW = 389
cs.X86_INS_PEXTRW = 390
cs.X86_INS_PHADDSW = 391
cs.X86_INS_PHADDW = 392
cs.X86_INS_PHADDD = 393
cs.X86_INS_PHSUBD = 394
cs.X86_INS_PHSUBSW = 395
cs.X86_INS_PHSUBW = 396
cs.X86_INS_PINSRW = 397
cs.X86_INS_PMADDUBSW = 398
cs.X86_INS_PMADDWD = 399
cs.X86_INS_PMAXSW = 400
cs.X86_INS_PMAXUB = 401
cs.X86_INS_PMINSW = 402
cs.X86_INS_PMINUB = 403
cs.X86_INS_PMOVMSKB = 404
cs.X86_INS_PMULHRSW = 405
cs.X86_INS_PMULHUW = 406
cs.X86_INS_PMULHW = 407
cs.X86_INS_PMULLW = 408
cs.X86_INS_PMULUDQ = 409
cs.X86_INS_POR = 410
cs.X86_INS_PSADBW = 411
cs.X86_INS_PSHUFB = 412
cs.X86_INS_PSHUFW = 413
cs.X86_INS_PSIGNB = 414
cs.X86_INS_PSIGND = 415
cs.X86_INS_PSIGNW = 416
cs.X86_INS_PSLLD = 417
cs.X86_INS_PSLLQ = 418
cs.X86_INS_PSLLW = 419
cs.X86_INS_PSRAD = 420
cs.X86_INS_PSRAW = 421
cs.X86_INS_PSRLD = 422
cs.X86_INS_PSRLQ = 423
cs.X86_INS_PSRLW = 424
cs.X86_INS_PSUBB = 425
cs.X86_INS_PSUBD = 426
cs.X86_INS_PSUBQ = 427
cs.X86_INS_PSUBSB = 428
cs.X86_INS_PSUBSW = 429
cs.X86_INS_PSUBUSB = 430
cs.X86_INS_PSUBUSW = 431
cs.X86_INS_PSUBW = 432
cs.X86_INS_PUNPCKHBW = 433
cs.X86_INS_PUNPCKHDQ = 434
cs.X86_INS_PUNPCKHWD = 435
cs.X86_INS_PUNPCKLBW = 436
cs.X86_INS_PUNPCKLDQ = 437
cs.X86_INS_PUNPCKLWD = 438
cs.X86_INS_PXOR = 439
cs.X86_INS_MONITOR = 440
cs.X86_INS_MONTMUL = 441
cs.X86_INS_MOV = 442
cs.X86_INS_MOVABS = 443
cs.X86_INS_MOVBE = 444
cs.X86_INS_MOVDDUP = 445
cs.X86_INS_MOVDQA = 446
cs.X86_INS_MOVDQU = 447
cs.X86_INS_MOVHLPS = 448
cs.X86_INS_MOVHPD = 449
cs.X86_INS_MOVHPS = 450
cs.X86_INS_MOVLHPS = 451
cs.X86_INS_MOVLPD = 452
cs.X86_INS_MOVLPS = 453
cs.X86_INS_MOVMSKPD = 454
cs.X86_INS_MOVMSKPS = 455
cs.X86_INS_MOVNTDQA = 456
cs.X86_INS_MOVNTDQ = 457
cs.X86_INS_MOVNTI = 458
cs.X86_INS_MOVNTPD = 459
cs.X86_INS_MOVNTPS = 460
cs.X86_INS_MOVNTSD = 461
cs.X86_INS_MOVNTSS = 462
cs.X86_INS_MOVSB = 463
cs.X86_INS_MOVSD = 464
cs.X86_INS_MOVSHDUP = 465
cs.X86_INS_MOVSLDUP = 466
cs.X86_INS_MOVSQ = 467
cs.X86_INS_MOVSS = 468
cs.X86_INS_MOVSW = 469
cs.X86_INS_MOVSX = 470
cs.X86_INS_MOVSXD = 471
cs.X86_INS_MOVUPD = 472
cs.X86_INS_MOVUPS = 473
cs.X86_INS_MOVZX = 474
cs.X86_INS_MPSADBW = 475
cs.X86_INS_MUL = 476
cs.X86_INS_MULPD = 477
cs.X86_INS_MULPS = 478
cs.X86_INS_MULSD = 479
cs.X86_INS_MULSS = 480
cs.X86_INS_MULX = 481
cs.X86_INS_FMUL = 482
cs.X86_INS_FIMUL = 483
cs.X86_INS_FMULP = 484
cs.X86_INS_MWAIT = 485
cs.X86_INS_NEG = 486
cs.X86_INS_NOP = 487
cs.X86_INS_NOT = 488
cs.X86_INS_OUT = 489
cs.X86_INS_OUTSB = 490
cs.X86_INS_OUTSD = 491
cs.X86_INS_OUTSW = 492
cs.X86_INS_PACKUSDW = 493
cs.X86_INS_PAUSE = 494
cs.X86_INS_PAVGUSB = 495
cs.X86_INS_PBLENDVB = 496
cs.X86_INS_PBLENDW = 497
cs.X86_INS_PCLMULQDQ = 498
cs.X86_INS_PCMPEQQ = 499
cs.X86_INS_PCMPESTRI = 500
cs.X86_INS_PCMPESTRM = 501
cs.X86_INS_PCMPGTQ = 502
cs.X86_INS_PCMPISTRI = 503
cs.X86_INS_PCMPISTRM = 504
cs.X86_INS_PDEP = 505
cs.X86_INS_PEXT = 506
cs.X86_INS_PEXTRB = 507
cs.X86_INS_PEXTRD = 508
cs.X86_INS_PEXTRQ = 509
cs.X86_INS_PF2ID = 510
cs.X86_INS_PF2IW = 511
cs.X86_INS_PFACC = 512
cs.X86_INS_PFADD = 513
cs.X86_INS_PFCMPEQ = 514
cs.X86_INS_PFCMPGE = 515
cs.X86_INS_PFCMPGT = 516
cs.X86_INS_PFMAX = 517
cs.X86_INS_PFMIN = 518
cs.X86_INS_PFMUL = 519
cs.X86_INS_PFNACC = 520
cs.X86_INS_PFPNACC = 521
cs.X86_INS_PFRCPIT1 = 522
cs.X86_INS_PFRCPIT2 = 523
cs.X86_INS_PFRCP = 524
cs.X86_INS_PFRSQIT1 = 525
cs.X86_INS_PFRSQRT = 526
cs.X86_INS_PFSUBR = 527
cs.X86_INS_PFSUB = 528
cs.X86_INS_PHMINPOSUW = 529
cs.X86_INS_PI2FD = 530
cs.X86_INS_PI2FW = 531
cs.X86_INS_PINSRB = 532
cs.X86_INS_PINSRD = 533
cs.X86_INS_PINSRQ = 534
cs.X86_INS_PMAXSB = 535
cs.X86_INS_PMAXSD = 536
cs.X86_INS_PMAXUD = 537
cs.X86_INS_PMAXUW = 538
cs.X86_INS_PMINSB = 539
cs.X86_INS_PMINSD = 540
cs.X86_INS_PMINUD = 541
cs.X86_INS_PMINUW = 542
cs.X86_INS_PMOVSXBD = 543
cs.X86_INS_PMOVSXBQ = 544
cs.X86_INS_PMOVSXBW = 545
cs.X86_INS_PMOVSXDQ = 546
cs.X86_INS_PMOVSXWD = 547
cs.X86_INS_PMOVSXWQ = 548
cs.X86_INS_PMOVZXBD = 549
cs.X86_INS_PMOVZXBQ = 550
cs.X86_INS_PMOVZXBW = 551
cs.X86_INS_PMOVZXDQ = 552
cs.X86_INS_PMOVZXWD = 553
cs.X86_INS_PMOVZXWQ = 554
cs.X86_INS_PMULDQ = 555
cs.X86_INS_PMULHRW = 556
cs.X86_INS_PMULLD = 557
cs.X86_INS_POP = 558
cs.X86_INS_POPAW = 559
cs.X86_INS_POPAL = 560
cs.X86_INS_POPCNT = 561
cs.X86_INS_POPF = 562
cs.X86_INS_POPFD = 563
cs.X86_INS_POPFQ = 564
cs.X86_INS_PREFETCH = 565
cs.X86_INS_PREFETCHNTA = 566
cs.X86_INS_PREFETCHT0 = 567
cs.X86_INS_PREFETCHT1 = 568
cs.X86_INS_PREFETCHT2 = 569
cs.X86_INS_PREFETCHW = 570
cs.X86_INS_PSHUFD = 571
cs.X86_INS_PSHUFHW = 572
cs.X86_INS_PSHUFLW = 573
cs.X86_INS_PSLLDQ = 574
cs.X86_INS_PSRLDQ = 575
cs.X86_INS_PSWAPD = 576
cs.X86_INS_PTEST = 577
cs.X86_INS_PUNPCKHQDQ = 578
cs.X86_INS_PUNPCKLQDQ = 579
cs.X86_INS_PUSH = 580
cs.X86_INS_PUSHAW = 581
cs.X86_INS_PUSHAL = 582
cs.X86_INS_PUSHF = 583
cs.X86_INS_PUSHFD = 584
cs.X86_INS_PUSHFQ = 585
cs.X86_INS_RCL = 586
cs.X86_INS_RCPPS = 587
cs.X86_INS_RCPSS = 588
cs.X86_INS_RCR = 589
cs.X86_INS_RDFSBASE = 590
cs.X86_INS_RDGSBASE = 591
cs.X86_INS_RDMSR = 592
cs.X86_INS_RDPMC = 593
cs.X86_INS_RDRAND = 594
cs.X86_INS_RDSEED = 595
cs.X86_INS_RDTSC = 596
cs.X86_INS_RDTSCP = 597
cs.X86_INS_ROL = 598
cs.X86_INS_ROR = 599
cs.X86_INS_RORX = 600
cs.X86_INS_ROUNDPD = 601
cs.X86_INS_ROUNDPS = 602
cs.X86_INS_ROUNDSD = 603
cs.X86_INS_ROUNDSS = 604
cs.X86_INS_RSM = 605
cs.X86_INS_RSQRTPS = 606
cs.X86_INS_RSQRTSS = 607
cs.X86_INS_SAHF = 608
cs.X86_INS_SAL = 609
cs.X86_INS_SALC = 610
cs.X86_INS_SAR = 611
cs.X86_INS_SARX = 612
cs.X86_INS_SBB = 613
cs.X86_INS_SCASB = 614
cs.X86_INS_SCASD = 615
cs.X86_INS_SCASQ = 616
cs.X86_INS_SCASW = 617
cs.X86_INS_SETAE = 618
cs.X86_INS_SETA = 619
cs.X86_INS_SETBE = 620
cs.X86_INS_SETB = 621
cs.X86_INS_SETE = 622
cs.X86_INS_SETGE = 623
cs.X86_INS_SETG = 624
cs.X86_INS_SETLE = 625
cs.X86_INS_SETL = 626
cs.X86_INS_SETNE = 627
cs.X86_INS_SETNO = 628
cs.X86_INS_SETNP = 629
cs.X86_INS_SETNS = 630
cs.X86_INS_SETO = 631
cs.X86_INS_SETP = 632
cs.X86_INS_SETS = 633
cs.X86_INS_SFENCE = 634
cs.X86_INS_SGDT = 635
cs.X86_INS_SHA1MSG1 = 636
cs.X86_INS_SHA1MSG2 = 637
cs.X86_INS_SHA1NEXTE = 638
cs.X86_INS_SHA1RNDS4 = 639
cs.X86_INS_SHA256MSG1 = 640
cs.X86_INS_SHA256MSG2 = 641
cs.X86_INS_SHA256RNDS2 = 642
cs.X86_INS_SHL = 643
cs.X86_INS_SHLD = 644
cs.X86_INS_SHLX = 645
cs.X86_INS_SHR = 646
cs.X86_INS_SHRD = 647
cs.X86_INS_SHRX = 648
cs.X86_INS_SHUFPD = 649
cs.X86_INS_SHUFPS = 650
cs.X86_INS_SIDT = 651
cs.X86_INS_FSIN = 652
cs.X86_INS_SKINIT = 653
cs.X86_INS_SLDT = 654
cs.X86_INS_SMSW = 655
cs.X86_INS_SQRTPD = 656
cs.X86_INS_SQRTPS = 657
cs.X86_INS_SQRTSD = 658
cs.X86_INS_SQRTSS = 659
cs.X86_INS_FSQRT = 660
cs.X86_INS_STAC = 661
cs.X86_INS_STC = 662
cs.X86_INS_STD = 663
cs.X86_INS_STGI = 664
cs.X86_INS_STI = 665
cs.X86_INS_STMXCSR = 666
cs.X86_INS_STOSB = 667
cs.X86_INS_STOSD = 668
cs.X86_INS_STOSQ = 669
cs.X86_INS_STOSW = 670
cs.X86_INS_STR = 671
cs.X86_INS_FST = 672
cs.X86_INS_FSTP = 673
cs.X86_INS_FSTPNCE = 674
cs.X86_INS_SUBPD = 675
cs.X86_INS_SUBPS = 676
cs.X86_INS_FSUBR = 677
cs.X86_INS_FISUBR = 678
cs.X86_INS_FSUBRP = 679
cs.X86_INS_SUBSD = 680
cs.X86_INS_SUBSS = 681
cs.X86_INS_FSUB = 682
cs.X86_INS_FISUB = 683
cs.X86_INS_FSUBP = 684
cs.X86_INS_SWAPGS = 685
cs.X86_INS_SYSCALL = 686
cs.X86_INS_SYSENTER = 687
cs.X86_INS_SYSEXIT = 688
cs.X86_INS_SYSRET = 689
cs.X86_INS_T1MSKC = 690
cs.X86_INS_TEST = 691
cs.X86_INS_UD2 = 692
cs.X86_INS_FTST = 693
cs.X86_INS_TZCNT = 694
cs.X86_INS_TZMSK = 695
cs.X86_INS_FUCOMPI = 696
cs.X86_INS_FUCOMI = 697
cs.X86_INS_FUCOMPP = 698
cs.X86_INS_FUCOMP = 699
cs.X86_INS_FUCOM = 700
cs.X86_INS_UD2B = 701
cs.X86_INS_UNPCKHPD = 702
cs.X86_INS_UNPCKHPS = 703
cs.X86_INS_UNPCKLPD = 704
cs.X86_INS_UNPCKLPS = 705
cs.X86_INS_VADDPD = 706
cs.X86_INS_VADDPS = 707
cs.X86_INS_VADDSD = 708
cs.X86_INS_VADDSS = 709
cs.X86_INS_VADDSUBPD = 710
cs.X86_INS_VADDSUBPS = 711
cs.X86_INS_VAESDECLAST = 712
cs.X86_INS_VAESDEC = 713
cs.X86_INS_VAESENCLAST = 714
cs.X86_INS_VAESENC = 715
cs.X86_INS_VAESIMC = 716
cs.X86_INS_VAESKEYGENASSIST = 717
cs.X86_INS_VALIGND = 718
cs.X86_INS_VALIGNQ = 719
cs.X86_INS_VANDNPD = 720
cs.X86_INS_VANDNPS = 721
cs.X86_INS_VANDPD = 722
cs.X86_INS_VANDPS = 723
cs.X86_INS_VBLENDMPD = 724
cs.X86_INS_VBLENDMPS = 725
cs.X86_INS_VBLENDPD = 726
cs.X86_INS_VBLENDPS = 727
cs.X86_INS_VBLENDVPD = 728
cs.X86_INS_VBLENDVPS = 729
cs.X86_INS_VBROADCASTF128 = 730
cs.X86_INS_VBROADCASTI128 = 731
cs.X86_INS_VBROADCASTI32X4 = 732
cs.X86_INS_VBROADCASTI64X4 = 733
cs.X86_INS_VBROADCASTSD = 734
cs.X86_INS_VBROADCASTSS = 735
cs.X86_INS_VCMPPD = 736
cs.X86_INS_VCMPPS = 737
cs.X86_INS_VCMPSD = 738
cs.X86_INS_VCMPSS = 739
cs.X86_INS_VCVTDQ2PD = 740
cs.X86_INS_VCVTDQ2PS = 741
cs.X86_INS_VCVTPD2DQX = 742
cs.X86_INS_VCVTPD2DQ = 743
cs.X86_INS_VCVTPD2PSX = 744
cs.X86_INS_VCVTPD2PS = 745
cs.X86_INS_VCVTPD2UDQ = 746
cs.X86_INS_VCVTPH2PS = 747
cs.X86_INS_VCVTPS2DQ = 748
cs.X86_INS_VCVTPS2PD = 749
cs.X86_INS_VCVTPS2PH = 750
cs.X86_INS_VCVTPS2UDQ = 751
cs.X86_INS_VCVTSD2SI = 752
cs.X86_INS_VCVTSD2USI = 753
cs.X86_INS_VCVTSS2SI = 754
cs.X86_INS_VCVTSS2USI = 755
cs.X86_INS_VCVTTPD2DQX = 756
cs.X86_INS_VCVTTPD2DQ = 757
cs.X86_INS_VCVTTPD2UDQ = 758
cs.X86_INS_VCVTTPS2DQ = 759
cs.X86_INS_VCVTTPS2UDQ = 760
cs.X86_INS_VCVTUDQ2PD = 761
cs.X86_INS_VCVTUDQ2PS = 762
cs.X86_INS_VDIVPD = 763
cs.X86_INS_VDIVPS = 764
cs.X86_INS_VDIVSD = 765
cs.X86_INS_VDIVSS = 766
cs.X86_INS_VDPPD = 767
cs.X86_INS_VDPPS = 768
cs.X86_INS_VERR = 769
cs.X86_INS_VERW = 770
cs.X86_INS_VEXTRACTF128 = 771
cs.X86_INS_VEXTRACTF32X4 = 772
cs.X86_INS_VEXTRACTF64X4 = 773
cs.X86_INS_VEXTRACTI128 = 774
cs.X86_INS_VEXTRACTI32X4 = 775
cs.X86_INS_VEXTRACTI64X4 = 776
cs.X86_INS_VEXTRACTPS = 777
cs.X86_INS_VFMADD132PD = 778
cs.X86_INS_VFMADD132PS = 779
cs.X86_INS_VFMADD213PD = 780
cs.X86_INS_VFMADD213PS = 781
cs.X86_INS_VFMADDPD = 782
cs.X86_INS_VFMADD231PD = 783
cs.X86_INS_VFMADDPS = 784
cs.X86_INS_VFMADD231PS = 785
cs.X86_INS_VFMADDSD = 786
cs.X86_INS_VFMADD213SD = 787
cs.X86_INS_VFMADD132SD = 788
cs.X86_INS_VFMADD231SD = 789
cs.X86_INS_VFMADDSS = 790
cs.X86_INS_VFMADD213SS = 791
cs.X86_INS_VFMADD132SS = 792
cs.X86_INS_VFMADD231SS = 793
cs.X86_INS_VFMADDSUB132PD = 794
cs.X86_INS_VFMADDSUB132PS = 795
cs.X86_INS_VFMADDSUB213PD = 796
cs.X86_INS_VFMADDSUB213PS = 797
cs.X86_INS_VFMADDSUBPD = 798
cs.X86_INS_VFMADDSUB231PD = 799
cs.X86_INS_VFMADDSUBPS = 800
cs.X86_INS_VFMADDSUB231PS = 801
cs.X86_INS_VFMSUB132PD = 802
cs.X86_INS_VFMSUB132PS = 803
cs.X86_INS_VFMSUB213PD = 804
cs.X86_INS_VFMSUB213PS = 805
cs.X86_INS_VFMSUBADD132PD = 806
cs.X86_INS_VFMSUBADD132PS = 807
cs.X86_INS_VFMSUBADD213PD = 808
cs.X86_INS_VFMSUBADD213PS = 809
cs.X86_INS_VFMSUBADDPD = 810
cs.X86_INS_VFMSUBADD231PD = 811
cs.X86_INS_VFMSUBADDPS = 812
cs.X86_INS_VFMSUBADD231PS = 813
cs.X86_INS_VFMSUBPD = 814
cs.X86_INS_VFMSUB231PD = 815
cs.X86_INS_VFMSUBPS = 816
cs.X86_INS_VFMSUB231PS = 817
cs.X86_INS_VFMSUBSD = 818
cs.X86_INS_VFMSUB213SD = 819
cs.X86_INS_VFMSUB132SD = 820
cs.X86_INS_VFMSUB231SD = 821
cs.X86_INS_VFMSUBSS = 822
cs.X86_INS_VFMSUB213SS = 823
cs.X86_INS_VFMSUB132SS = 824
cs.X86_INS_VFMSUB231SS = 825
cs.X86_INS_VFNMADD132PD = 826
cs.X86_INS_VFNMADD132PS = 827
cs.X86_INS_VFNMADD213PD = 828
cs.X86_INS_VFNMADD213PS = 829
cs.X86_INS_VFNMADDPD = 830
cs.X86_INS_VFNMADD231PD = 831
cs.X86_INS_VFNMADDPS = 832
cs.X86_INS_VFNMADD231PS = 833
cs.X86_INS_VFNMADDSD = 834
cs.X86_INS_VFNMADD213SD = 835
cs.X86_INS_VFNMADD132SD = 836
cs.X86_INS_VFNMADD231SD = 837
cs.X86_INS_VFNMADDSS = 838
cs.X86_INS_VFNMADD213SS = 839
cs.X86_INS_VFNMADD132SS = 840
cs.X86_INS_VFNMADD231SS = 841
cs.X86_INS_VFNMSUB132PD = 842
cs.X86_INS_VFNMSUB132PS = 843
cs.X86_INS_VFNMSUB213PD = 844
cs.X86_INS_VFNMSUB213PS = 845
cs.X86_INS_VFNMSUBPD = 846
cs.X86_INS_VFNMSUB231PD = 847
cs.X86_INS_VFNMSUBPS = 848
cs.X86_INS_VFNMSUB231PS = 849
cs.X86_INS_VFNMSUBSD = 850
cs.X86_INS_VFNMSUB213SD = 851
cs.X86_INS_VFNMSUB132SD = 852
cs.X86_INS_VFNMSUB231SD = 853
cs.X86_INS_VFNMSUBSS = 854
cs.X86_INS_VFNMSUB213SS = 855
cs.X86_INS_VFNMSUB132SS = 856
cs.X86_INS_VFNMSUB231SS = 857
cs.X86_INS_VFRCZPD = 858
cs.X86_INS_VFRCZPS = 859
cs.X86_INS_VFRCZSD = 860
cs.X86_INS_VFRCZSS = 861
cs.X86_INS_VORPD = 862
cs.X86_INS_VORPS = 863
cs.X86_INS_VXORPD = 864
cs.X86_INS_VXORPS = 865
cs.X86_INS_VGATHERDPD = 866
cs.X86_INS_VGATHERDPS = 867
cs.X86_INS_VGATHERPF0DPD = 868
cs.X86_INS_VGATHERPF0DPS = 869
cs.X86_INS_VGATHERPF0QPD = 870
cs.X86_INS_VGATHERPF0QPS = 871
cs.X86_INS_VGATHERPF1DPD = 872
cs.X86_INS_VGATHERPF1DPS = 873
cs.X86_INS_VGATHERPF1QPD = 874
cs.X86_INS_VGATHERPF1QPS = 875
cs.X86_INS_VGATHERQPD = 876
cs.X86_INS_VGATHERQPS = 877
cs.X86_INS_VHADDPD = 878
cs.X86_INS_VHADDPS = 879
cs.X86_INS_VHSUBPD = 880
cs.X86_INS_VHSUBPS = 881
cs.X86_INS_VINSERTF128 = 882
cs.X86_INS_VINSERTF32X4 = 883
cs.X86_INS_VINSERTF64X4 = 884
cs.X86_INS_VINSERTI128 = 885
cs.X86_INS_VINSERTI32X4 = 886
cs.X86_INS_VINSERTI64X4 = 887
cs.X86_INS_VINSERTPS = 888
cs.X86_INS_VLDDQU = 889
cs.X86_INS_VLDMXCSR = 890
cs.X86_INS_VMASKMOVDQU = 891
cs.X86_INS_VMASKMOVPD = 892
cs.X86_INS_VMASKMOVPS = 893
cs.X86_INS_VMAXPD = 894
cs.X86_INS_VMAXPS = 895
cs.X86_INS_VMAXSD = 896
cs.X86_INS_VMAXSS = 897
cs.X86_INS_VMCALL = 898
cs.X86_INS_VMCLEAR = 899
cs.X86_INS_VMFUNC = 900
cs.X86_INS_VMINPD = 901
cs.X86_INS_VMINPS = 902
cs.X86_INS_VMINSD = 903
cs.X86_INS_VMINSS = 904
cs.X86_INS_VMLAUNCH = 905
cs.X86_INS_VMLOAD = 906
cs.X86_INS_VMMCALL = 907
cs.X86_INS_VMOVQ = 908
cs.X86_INS_VMOVDDUP = 909
cs.X86_INS_VMOVD = 910
cs.X86_INS_VMOVDQA32 = 911
cs.X86_INS_VMOVDQA64 = 912
cs.X86_INS_VMOVDQA = 913
cs.X86_INS_VMOVDQU16 = 914
cs.X86_INS_VMOVDQU32 = 915
cs.X86_INS_VMOVDQU64 = 916
cs.X86_INS_VMOVDQU8 = 917
cs.X86_INS_VMOVDQU = 918
cs.X86_INS_VMOVHLPS = 919
cs.X86_INS_VMOVHPD = 920
cs.X86_INS_VMOVHPS = 921
cs.X86_INS_VMOVLHPS = 922
cs.X86_INS_VMOVLPD = 923
cs.X86_INS_VMOVLPS = 924
cs.X86_INS_VMOVMSKPD = 925
cs.X86_INS_VMOVMSKPS = 926
cs.X86_INS_VMOVNTDQA = 927
cs.X86_INS_VMOVNTDQ = 928
cs.X86_INS_VMOVNTPD = 929
cs.X86_INS_VMOVNTPS = 930
cs.X86_INS_VMOVSD = 931
cs.X86_INS_VMOVSHDUP = 932
cs.X86_INS_VMOVSLDUP = 933
cs.X86_INS_VMOVSS = 934
cs.X86_INS_VMOVUPD = 935
cs.X86_INS_VMOVUPS = 936
cs.X86_INS_VMPSADBW = 937
cs.X86_INS_VMPTRLD = 938
cs.X86_INS_VMPTRST = 939
cs.X86_INS_VMREAD = 940
cs.X86_INS_VMRESUME = 941
cs.X86_INS_VMRUN = 942
cs.X86_INS_VMSAVE = 943
cs.X86_INS_VMULPD = 944
cs.X86_INS_VMULPS = 945
cs.X86_INS_VMULSD = 946
cs.X86_INS_VMULSS = 947
cs.X86_INS_VMWRITE = 948
cs.X86_INS_VMXOFF = 949
cs.X86_INS_VMXON = 950
cs.X86_INS_VPABSB = 951
cs.X86_INS_VPABSD = 952
cs.X86_INS_VPABSQ = 953
cs.X86_INS_VPABSW = 954
cs.X86_INS_VPACKSSDW = 955
cs.X86_INS_VPACKSSWB = 956
cs.X86_INS_VPACKUSDW = 957
cs.X86_INS_VPACKUSWB = 958
cs.X86_INS_VPADDB = 959
cs.X86_INS_VPADDD = 960
cs.X86_INS_VPADDQ = 961
cs.X86_INS_VPADDSB = 962
cs.X86_INS_VPADDSW = 963
cs.X86_INS_VPADDUSB = 964
cs.X86_INS_VPADDUSW = 965
cs.X86_INS_VPADDW = 966
cs.X86_INS_VPALIGNR = 967
cs.X86_INS_VPANDD = 968
cs.X86_INS_VPANDND = 969
cs.X86_INS_VPANDNQ = 970
cs.X86_INS_VPANDN = 971
cs.X86_INS_VPANDQ = 972
cs.X86_INS_VPAND = 973
cs.X86_INS_VPAVGB = 974
cs.X86_INS_VPAVGW = 975
cs.X86_INS_VPBLENDD = 976
cs.X86_INS_VPBLENDMD = 977
cs.X86_INS_VPBLENDMQ = 978
cs.X86_INS_VPBLENDVB = 979
cs.X86_INS_VPBLENDW = 980
cs.X86_INS_VPBROADCASTB = 981
cs.X86_INS_VPBROADCASTD = 982
cs.X86_INS_VPBROADCASTMB2Q = 983
cs.X86_INS_VPBROADCASTMW2D = 984
cs.X86_INS_VPBROADCASTQ = 985
cs.X86_INS_VPBROADCASTW = 986
cs.X86_INS_VPCLMULQDQ = 987
cs.X86_INS_VPCMOV = 988
cs.X86_INS_VPCMP = 989
cs.X86_INS_VPCMPD = 990
cs.X86_INS_VPCMPEQB = 991
cs.X86_INS_VPCMPEQD = 992
cs.X86_INS_VPCMPEQQ = 993
cs.X86_INS_VPCMPEQW = 994
cs.X86_INS_VPCMPESTRI = 995
cs.X86_INS_VPCMPESTRM = 996
cs.X86_INS_VPCMPGTB = 997
cs.X86_INS_VPCMPGTD = 998
cs.X86_INS_VPCMPGTQ = 999
cs.X86_INS_VPCMPGTW = 1000
cs.X86_INS_VPCMPISTRI = 1001
cs.X86_INS_VPCMPISTRM = 1002
cs.X86_INS_VPCMPQ = 1003
cs.X86_INS_VPCMPUD = 1004
cs.X86_INS_VPCMPUQ = 1005
cs.X86_INS_VPCOMB = 1006
cs.X86_INS_VPCOMD = 1007
cs.X86_INS_VPCOMQ = 1008
cs.X86_INS_VPCOMUB = 1009
cs.X86_INS_VPCOMUD = 1010
cs.X86_INS_VPCOMUQ = 1011
cs.X86_INS_VPCOMUW = 1012
cs.X86_INS_VPCOMW = 1013
cs.X86_INS_VPCONFLICTD = 1014
cs.X86_INS_VPCONFLICTQ = 1015
cs.X86_INS_VPERM2F128 = 1016
cs.X86_INS_VPERM2I128 = 1017
cs.X86_INS_VPERMD = 1018
cs.X86_INS_VPERMI2D = 1019
cs.X86_INS_VPERMI2PD = 1020
cs.X86_INS_VPERMI2PS = 1021
cs.X86_INS_VPERMI2Q = 1022
cs.X86_INS_VPERMIL2PD = 1023
cs.X86_INS_VPERMIL2PS = 1024
cs.X86_INS_VPERMILPD = 1025
cs.X86_INS_VPERMILPS = 1026
cs.X86_INS_VPERMPD = 1027
cs.X86_INS_VPERMPS = 1028
cs.X86_INS_VPERMQ = 1029
cs.X86_INS_VPERMT2D = 1030
cs.X86_INS_VPERMT2PD = 1031
cs.X86_INS_VPERMT2PS = 1032
cs.X86_INS_VPERMT2Q = 1033
cs.X86_INS_VPEXTRB = 1034
cs.X86_INS_VPEXTRD = 1035
cs.X86_INS_VPEXTRQ = 1036
cs.X86_INS_VPEXTRW = 1037
cs.X86_INS_VPGATHERDD = 1038
cs.X86_INS_VPGATHERDQ = 1039
cs.X86_INS_VPGATHERQD = 1040
cs.X86_INS_VPGATHERQQ = 1041
cs.X86_INS_VPHADDBD = 1042
cs.X86_INS_VPHADDBQ = 1043
cs.X86_INS_VPHADDBW = 1044
cs.X86_INS_VPHADDDQ = 1045
cs.X86_INS_VPHADDD = 1046
cs.X86_INS_VPHADDSW = 1047
cs.X86_INS_VPHADDUBD = 1048
cs.X86_INS_VPHADDUBQ = 1049
cs.X86_INS_VPHADDUBW = 1050
cs.X86_INS_VPHADDUDQ = 1051
cs.X86_INS_VPHADDUWD = 1052
cs.X86_INS_VPHADDUWQ = 1053
cs.X86_INS_VPHADDWD = 1054
cs.X86_INS_VPHADDWQ = 1055
cs.X86_INS_VPHADDW = 1056
cs.X86_INS_VPHMINPOSUW = 1057
cs.X86_INS_VPHSUBBW = 1058
cs.X86_INS_VPHSUBDQ = 1059
cs.X86_INS_VPHSUBD = 1060
cs.X86_INS_VPHSUBSW = 1061
cs.X86_INS_VPHSUBWD = 1062
cs.X86_INS_VPHSUBW = 1063
cs.X86_INS_VPINSRB = 1064
cs.X86_INS_VPINSRD = 1065
cs.X86_INS_VPINSRQ = 1066
cs.X86_INS_VPINSRW = 1067
cs.X86_INS_VPLZCNTD = 1068
cs.X86_INS_VPLZCNTQ = 1069
cs.X86_INS_VPMACSDD = 1070
cs.X86_INS_VPMACSDQH = 1071
cs.X86_INS_VPMACSDQL = 1072
cs.X86_INS_VPMACSSDD = 1073
cs.X86_INS_VPMACSSDQH = 1074
cs.X86_INS_VPMACSSDQL = 1075
cs.X86_INS_VPMACSSWD = 1076
cs.X86_INS_VPMACSSWW = 1077
cs.X86_INS_VPMACSWD = 1078
cs.X86_INS_VPMACSWW = 1079
cs.X86_INS_VPMADCSSWD = 1080
cs.X86_INS_VPMADCSWD = 1081
cs.X86_INS_VPMADDUBSW = 1082
cs.X86_INS_VPMADDWD = 1083
cs.X86_INS_VPMASKMOVD = 1084
cs.X86_INS_VPMASKMOVQ = 1085
cs.X86_INS_VPMAXSB = 1086
cs.X86_INS_VPMAXSD = 1087
cs.X86_INS_VPMAXSQ = 1088
cs.X86_INS_VPMAXSW = 1089
cs.X86_INS_VPMAXUB = 1090
cs.X86_INS_VPMAXUD = 1091
cs.X86_INS_VPMAXUQ = 1092
cs.X86_INS_VPMAXUW = 1093
cs.X86_INS_VPMINSB = 1094
cs.X86_INS_VPMINSD = 1095
cs.X86_INS_VPMINSQ = 1096
cs.X86_INS_VPMINSW = 1097
cs.X86_INS_VPMINUB = 1098
cs.X86_INS_VPMINUD = 1099
cs.X86_INS_VPMINUQ = 1100
cs.X86_INS_VPMINUW = 1101
cs.X86_INS_VPMOVDB = 1102
cs.X86_INS_VPMOVDW = 1103
cs.X86_INS_VPMOVMSKB = 1104
cs.X86_INS_VPMOVQB = 1105
cs.X86_INS_VPMOVQD = 1106
cs.X86_INS_VPMOVQW = 1107
cs.X86_INS_VPMOVSDB = 1108
cs.X86_INS_VPMOVSDW = 1109
cs.X86_INS_VPMOVSQB = 1110
cs.X86_INS_VPMOVSQD = 1111
cs.X86_INS_VPMOVSQW = 1112
cs.X86_INS_VPMOVSXBD = 1113
cs.X86_INS_VPMOVSXBQ = 1114
cs.X86_INS_VPMOVSXBW = 1115
cs.X86_INS_VPMOVSXDQ = 1116
cs.X86_INS_VPMOVSXWD = 1117
cs.X86_INS_VPMOVSXWQ = 1118
cs.X86_INS_VPMOVUSDB = 1119
cs.X86_INS_VPMOVUSDW = 1120
cs.X86_INS_VPMOVUSQB = 1121
cs.X86_INS_VPMOVUSQD = 1122
cs.X86_INS_VPMOVUSQW = 1123
cs.X86_INS_VPMOVZXBD = 1124
cs.X86_INS_VPMOVZXBQ = 1125
cs.X86_INS_VPMOVZXBW = 1126
cs.X86_INS_VPMOVZXDQ = 1127
cs.X86_INS_VPMOVZXWD = 1128
cs.X86_INS_VPMOVZXWQ = 1129
cs.X86_INS_VPMULDQ = 1130
cs.X86_INS_VPMULHRSW = 1131
cs.X86_INS_VPMULHUW = 1132
cs.X86_INS_VPMULHW = 1133
cs.X86_INS_VPMULLD = 1134
cs.X86_INS_VPMULLW = 1135
cs.X86_INS_VPMULUDQ = 1136
cs.X86_INS_VPORD = 1137
cs.X86_INS_VPORQ = 1138
cs.X86_INS_VPOR = 1139
cs.X86_INS_VPPERM = 1140
cs.X86_INS_VPROTB = 1141
cs.X86_INS_VPROTD = 1142
cs.X86_INS_VPROTQ = 1143
cs.X86_INS_VPROTW = 1144
cs.X86_INS_VPSADBW = 1145
cs.X86_INS_VPSCATTERDD = 1146
cs.X86_INS_VPSCATTERDQ = 1147
cs.X86_INS_VPSCATTERQD = 1148
cs.X86_INS_VPSCATTERQQ = 1149
cs.X86_INS_VPSHAB = 1150
cs.X86_INS_VPSHAD = 1151
cs.X86_INS_VPSHAQ = 1152
cs.X86_INS_VPSHAW = 1153
cs.X86_INS_VPSHLB = 1154
cs.X86_INS_VPSHLD = 1155
cs.X86_INS_VPSHLQ = 1156
cs.X86_INS_VPSHLW = 1157
cs.X86_INS_VPSHUFB = 1158
cs.X86_INS_VPSHUFD = 1159
cs.X86_INS_VPSHUFHW = 1160
cs.X86_INS_VPSHUFLW = 1161
cs.X86_INS_VPSIGNB = 1162
cs.X86_INS_VPSIGND = 1163
cs.X86_INS_VPSIGNW = 1164
cs.X86_INS_VPSLLDQ = 1165
cs.X86_INS_VPSLLD = 1166
cs.X86_INS_VPSLLQ = 1167
cs.X86_INS_VPSLLVD = 1168
cs.X86_INS_VPSLLVQ = 1169
cs.X86_INS_VPSLLW = 1170
cs.X86_INS_VPSRAD = 1171
cs.X86_INS_VPSRAQ = 1172
cs.X86_INS_VPSRAVD = 1173
cs.X86_INS_VPSRAVQ = 1174
cs.X86_INS_VPSRAW = 1175
cs.X86_INS_VPSRLDQ = 1176
cs.X86_INS_VPSRLD = 1177
cs.X86_INS_VPSRLQ = 1178
cs.X86_INS_VPSRLVD = 1179
cs.X86_INS_VPSRLVQ = 1180
cs.X86_INS_VPSRLW = 1181
cs.X86_INS_VPSUBB = 1182
cs.X86_INS_VPSUBD = 1183
cs.X86_INS_VPSUBQ = 1184
cs.X86_INS_VPSUBSB = 1185
cs.X86_INS_VPSUBSW = 1186
cs.X86_INS_VPSUBUSB = 1187
cs.X86_INS_VPSUBUSW = 1188
cs.X86_INS_VPSUBW = 1189
cs.X86_INS_VPTESTMD = 1190
cs.X86_INS_VPTESTMQ = 1191
cs.X86_INS_VPTESTNMD = 1192
cs.X86_INS_VPTESTNMQ = 1193
cs.X86_INS_VPTEST = 1194
cs.X86_INS_VPUNPCKHBW = 1195
cs.X86_INS_VPUNPCKHDQ = 1196
cs.X86_INS_VPUNPCKHQDQ = 1197
cs.X86_INS_VPUNPCKHWD = 1198
cs.X86_INS_VPUNPCKLBW = 1199
cs.X86_INS_VPUNPCKLDQ = 1200
cs.X86_INS_VPUNPCKLQDQ = 1201
cs.X86_INS_VPUNPCKLWD = 1202
cs.X86_INS_VPXORD = 1203
cs.X86_INS_VPXORQ = 1204
cs.X86_INS_VPXOR = 1205
cs.X86_INS_VRCP14PD = 1206
cs.X86_INS_VRCP14PS = 1207
cs.X86_INS_VRCP14SD = 1208
cs.X86_INS_VRCP14SS = 1209
cs.X86_INS_VRCP28PD = 1210
cs.X86_INS_VRCP28PS = 1211
cs.X86_INS_VRCP28SD = 1212
cs.X86_INS_VRCP28SS = 1213
cs.X86_INS_VRCPPS = 1214
cs.X86_INS_VRCPSS = 1215
cs.X86_INS_VRNDSCALEPD = 1216
cs.X86_INS_VRNDSCALEPS = 1217
cs.X86_INS_VRNDSCALESD = 1218
cs.X86_INS_VRNDSCALESS = 1219
cs.X86_INS_VROUNDPD = 1220
cs.X86_INS_VROUNDPS = 1221
cs.X86_INS_VROUNDSD = 1222
cs.X86_INS_VROUNDSS = 1223
cs.X86_INS_VRSQRT14PD = 1224
cs.X86_INS_VRSQRT14PS = 1225
cs.X86_INS_VRSQRT14SD = 1226
cs.X86_INS_VRSQRT14SS = 1227
cs.X86_INS_VRSQRT28PD = 1228
cs.X86_INS_VRSQRT28PS = 1229
cs.X86_INS_VRSQRT28SD = 1230
cs.X86_INS_VRSQRT28SS = 1231
cs.X86_INS_VRSQRTPS = 1232
cs.X86_INS_VRSQRTSS = 1233
cs.X86_INS_VSCATTERDPD = 1234
cs.X86_INS_VSCATTERDPS = 1235
cs.X86_INS_VSCATTERPF0DPD = 1236
cs.X86_INS_VSCATTERPF0DPS = 1237
cs.X86_INS_VSCATTERPF0QPD = 1238
cs.X86_INS_VSCATTERPF0QPS = 1239
cs.X86_INS_VSCATTERPF1DPD = 1240
cs.X86_INS_VSCATTERPF1DPS = 1241
cs.X86_INS_VSCATTERPF1QPD = 1242
cs.X86_INS_VSCATTERPF1QPS = 1243
cs.X86_INS_VSCATTERQPD = 1244
cs.X86_INS_VSCATTERQPS = 1245
cs.X86_INS_VSHUFPD = 1246
cs.X86_INS_VSHUFPS = 1247
cs.X86_INS_VSQRTPD = 1248
cs.X86_INS_VSQRTPS = 1249
cs.X86_INS_VSQRTSD = 1250
cs.X86_INS_VSQRTSS = 1251
cs.X86_INS_VSTMXCSR = 1252
cs.X86_INS_VSUBPD = 1253
cs.X86_INS_VSUBPS = 1254
cs.X86_INS_VSUBSD = 1255
cs.X86_INS_VSUBSS = 1256
cs.X86_INS_VTESTPD = 1257
cs.X86_INS_VTESTPS = 1258
cs.X86_INS_VUNPCKHPD = 1259
cs.X86_INS_VUNPCKHPS = 1260
cs.X86_INS_VUNPCKLPD = 1261
cs.X86_INS_VUNPCKLPS = 1262
cs.X86_INS_VZEROALL = 1263
cs.X86_INS_VZEROUPPER = 1264
cs.X86_INS_WAIT = 1265
cs.X86_INS_WBINVD = 1266
cs.X86_INS_WRFSBASE = 1267
cs.X86_INS_WRGSBASE = 1268
cs.X86_INS_WRMSR = 1269
cs.X86_INS_XABORT = 1270
cs.X86_INS_XACQUIRE = 1271
cs.X86_INS_XBEGIN = 1272
cs.X86_INS_XCHG = 1273
cs.X86_INS_FXCH = 1274
cs.X86_INS_XCRYPTCBC = 1275
cs.X86_INS_XCRYPTCFB = 1276
cs.X86_INS_XCRYPTCTR = 1277
cs.X86_INS_XCRYPTECB = 1278
cs.X86_INS_XCRYPTOFB = 1279
cs.X86_INS_XEND = 1280
cs.X86_INS_XGETBV = 1281
cs.X86_INS_XLATB = 1282
cs.X86_INS_XRELEASE = 1283
cs.X86_INS_XRSTOR = 1284
cs.X86_INS_XRSTOR64 = 1285
cs.X86_INS_XSAVE = 1286
cs.X86_INS_XSAVE64 = 1287
cs.X86_INS_XSAVEOPT = 1288
cs.X86_INS_XSAVEOPT64 = 1289
cs.X86_INS_XSETBV = 1290
cs.X86_INS_XSHA1 = 1291
cs.X86_INS_XSHA256 = 1292
cs.X86_INS_XSTORE = 1293
cs.X86_INS_XTEST = 1294
cs.X86_INS_ENDING = 1295
// Group of X86 instructions
cs.X86_GRP_INVALID = 0
// Generic groups
cs.X86_GRP_JUMP = 1
cs.X86_GRP_CALL = 2
cs.X86_GRP_RET = 3
cs.X86_GRP_INT = 4
cs.X86_GRP_IRET = 5
// Architecture-specific groups
cs.X86_GRP_VM = 128
cs.X86_GRP_3DNOW = 129
cs.X86_GRP_AES = 130
cs.X86_GRP_ADX = 131
cs.X86_GRP_AVX = 132
cs.X86_GRP_AVX2 = 133
cs.X86_GRP_AVX512 = 134
cs.X86_GRP_BMI = 135
cs.X86_GRP_BMI2 = 136
cs.X86_GRP_CMOV = 137
cs.X86_GRP_F16C = 138
cs.X86_GRP_FMA = 139
cs.X86_GRP_FMA4 = 140
cs.X86_GRP_FSGSBASE = 141
cs.X86_GRP_HLE = 142
cs.X86_GRP_MMX = 143
cs.X86_GRP_MODE32 = 144
cs.X86_GRP_MODE64 = 145
cs.X86_GRP_RTM = 146
cs.X86_GRP_SHA = 147
cs.X86_GRP_SSE1 = 148
cs.X86_GRP_SSE2 = 149
cs.X86_GRP_SSE3 = 150
cs.X86_GRP_SSE41 = 151
cs.X86_GRP_SSE42 = 152
cs.X86_GRP_SSE4A = 153
cs.X86_GRP_SSSE3 = 154
cs.X86_GRP_PCLMUL = 155
cs.X86_GRP_XOP = 156
cs.X86_GRP_CDI = 157
cs.X86_GRP_ERI = 158
cs.X86_GRP_TBM = 159
cs.X86_GRP_16BITMODE = 160
cs.X86_GRP_NOT64BITMODE = 161
cs.X86_GRP_SGX = 162
cs.X86_GRP_DQI = 163
cs.X86_GRP_BWI = 164
cs.X86_GRP_PFI = 165
cs.X86_GRP_VLX = 166
cs.X86_GRP_SMAP = 167
cs.X86_GRP_NOVLX = 168
cs.X86_GRP_ENDING = 169
// For Capstone Engine. AUTO-GENERATED FILE, DO NOT EDIT [xcore_const.py]
// Operand type for instruction's operands
cs.XCORE_OP_INVALID = 0
cs.XCORE_OP_REG = 1
cs.XCORE_OP_IMM = 2
cs.XCORE_OP_MEM = 3
// XCore registers
cs.XCORE_REG_INVALID = 0
cs.XCORE_REG_CP = 1
cs.XCORE_REG_DP = 2
cs.XCORE_REG_LR = 3
cs.XCORE_REG_SP = 4
cs.XCORE_REG_R0 = 5
cs.XCORE_REG_R1 = 6
cs.XCORE_REG_R2 = 7
cs.XCORE_REG_R3 = 8
cs.XCORE_REG_R4 = 9
cs.XCORE_REG_R5 = 10
cs.XCORE_REG_R6 = 11
cs.XCORE_REG_R7 = 12
cs.XCORE_REG_R8 = 13
cs.XCORE_REG_R9 = 14
cs.XCORE_REG_R10 = 15
cs.XCORE_REG_R11 = 16
// pseudo registers
cs.XCORE_REG_PC = 17
cs.XCORE_REG_SCP = 18
cs.XCORE_REG_SSR = 19
cs.XCORE_REG_ET = 20
cs.XCORE_REG_ED = 21
cs.XCORE_REG_SED = 22
cs.XCORE_REG_KEP = 23
cs.XCORE_REG_KSP = 24
cs.XCORE_REG_ID = 25
cs.XCORE_REG_ENDING = 26
// XCore instruction
cs.XCORE_INS_INVALID = 0
cs.XCORE_INS_ADD = 1
cs.XCORE_INS_ANDNOT = 2
cs.XCORE_INS_AND = 3
cs.XCORE_INS_ASHR = 4
cs.XCORE_INS_BAU = 5
cs.XCORE_INS_BITREV = 6
cs.XCORE_INS_BLA = 7
cs.XCORE_INS_BLAT = 8
cs.XCORE_INS_BL = 9
cs.XCORE_INS_BF = 10
cs.XCORE_INS_BT = 11
cs.XCORE_INS_BU = 12
cs.XCORE_INS_BRU = 13
cs.XCORE_INS_BYTEREV = 14
cs.XCORE_INS_CHKCT = 15
cs.XCORE_INS_CLRE = 16
cs.XCORE_INS_CLRPT = 17
cs.XCORE_INS_CLRSR = 18
cs.XCORE_INS_CLZ = 19
cs.XCORE_INS_CRC8 = 20
cs.XCORE_INS_CRC32 = 21
cs.XCORE_INS_DCALL = 22
cs.XCORE_INS_DENTSP = 23
cs.XCORE_INS_DGETREG = 24
cs.XCORE_INS_DIVS = 25
cs.XCORE_INS_DIVU = 26
cs.XCORE_INS_DRESTSP = 27
cs.XCORE_INS_DRET = 28
cs.XCORE_INS_ECALLF = 29
cs.XCORE_INS_ECALLT = 30
cs.XCORE_INS_EDU = 31
cs.XCORE_INS_EEF = 32
cs.XCORE_INS_EET = 33
cs.XCORE_INS_EEU = 34
cs.XCORE_INS_ENDIN = 35
cs.XCORE_INS_ENTSP = 36
cs.XCORE_INS_EQ = 37
cs.XCORE_INS_EXTDP = 38
cs.XCORE_INS_EXTSP = 39
cs.XCORE_INS_FREER = 40
cs.XCORE_INS_FREET = 41
cs.XCORE_INS_GETD = 42
cs.XCORE_INS_GET = 43
cs.XCORE_INS_GETN = 44
cs.XCORE_INS_GETR = 45
cs.XCORE_INS_GETSR = 46
cs.XCORE_INS_GETST = 47
cs.XCORE_INS_GETTS = 48
cs.XCORE_INS_INCT = 49
cs.XCORE_INS_INIT = 50
cs.XCORE_INS_INPW = 51
cs.XCORE_INS_INSHR = 52
cs.XCORE_INS_INT = 53
cs.XCORE_INS_IN = 54
cs.XCORE_INS_KCALL = 55
cs.XCORE_INS_KENTSP = 56
cs.XCORE_INS_KRESTSP = 57
cs.XCORE_INS_KRET = 58
cs.XCORE_INS_LADD = 59
cs.XCORE_INS_LD16S = 60
cs.XCORE_INS_LD8U = 61
cs.XCORE_INS_LDA16 = 62
cs.XCORE_INS_LDAP = 63
cs.XCORE_INS_LDAW = 64
cs.XCORE_INS_LDC = 65
cs.XCORE_INS_LDW = 66
cs.XCORE_INS_LDIVU = 67
cs.XCORE_INS_LMUL = 68
cs.XCORE_INS_LSS = 69
cs.XCORE_INS_LSUB = 70
cs.XCORE_INS_LSU = 71
cs.XCORE_INS_MACCS = 72
cs.XCORE_INS_MACCU = 73
cs.XCORE_INS_MJOIN = 74
cs.XCORE_INS_MKMSK = 75
cs.XCORE_INS_MSYNC = 76
cs.XCORE_INS_MUL = 77
cs.XCORE_INS_NEG = 78
cs.XCORE_INS_NOT = 79
cs.XCORE_INS_OR = 80
cs.XCORE_INS_OUTCT = 81
cs.XCORE_INS_OUTPW = 82
cs.XCORE_INS_OUTSHR = 83
cs.XCORE_INS_OUTT = 84
cs.XCORE_INS_OUT = 85
cs.XCORE_INS_PEEK = 86
cs.XCORE_INS_REMS = 87
cs.XCORE_INS_REMU = 88
cs.XCORE_INS_RETSP = 89
cs.XCORE_INS_SETCLK = 90
cs.XCORE_INS_SET = 91
cs.XCORE_INS_SETC = 92
cs.XCORE_INS_SETD = 93
cs.XCORE_INS_SETEV = 94
cs.XCORE_INS_SETN = 95
cs.XCORE_INS_SETPSC = 96
cs.XCORE_INS_SETPT = 97
cs.XCORE_INS_SETRDY = 98
cs.XCORE_INS_SETSR = 99
cs.XCORE_INS_SETTW = 100
cs.XCORE_INS_SETV = 101
cs.XCORE_INS_SEXT = 102
cs.XCORE_INS_SHL = 103
cs.XCORE_INS_SHR = 104
cs.XCORE_INS_SSYNC = 105
cs.XCORE_INS_ST16 = 106
cs.XCORE_INS_ST8 = 107
cs.XCORE_INS_STW = 108
cs.XCORE_INS_SUB = 109
cs.XCORE_INS_SYNCR = 110
cs.XCORE_INS_TESTCT = 111
cs.XCORE_INS_TESTLCL = 112
cs.XCORE_INS_TESTWCT = 113
cs.XCORE_INS_TSETMR = 114
cs.XCORE_INS_START = 115
cs.XCORE_INS_WAITEF = 116
cs.XCORE_INS_WAITET = 117
cs.XCORE_INS_WAITEU = 118
cs.XCORE_INS_XOR = 119
cs.XCORE_INS_ZEXT = 120
cs.XCORE_INS_ENDING = 121
// Group of XCore instructions
cs.XCORE_GRP_INVALID = 0
// Generic groups
cs.XCORE_GRP_JUMP = 1
cs.XCORE_GRP_ENDING = 2