Initialisation des registres de la VM
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parent
734b7df66b
commit
0f81376eec
118
test.cpp
118
test.cpp
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@ -2,6 +2,7 @@
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#include <iostream>
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#include <iostream>
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#include <string>
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#include <string>
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#include <sstream>
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#include <sstream>
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#include <iomanip>
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#include <keystone/keystone.h>
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#include <keystone/keystone.h>
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#include <unicorn/unicorn.h>
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#include <unicorn/unicorn.h>
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#include <capstone/capstone.h>
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#include <capstone/capstone.h>
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@ -129,7 +130,8 @@ class Goal {
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public:
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public:
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std::string title;
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std::string title;
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std::string description;
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std::string description;
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std::string help;
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std::string help;
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std::string code;
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State init;
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State init;
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State goal;
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State goal;
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};
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};
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@ -250,6 +252,7 @@ void TextWindow::adjustSize()
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scrolltext.setGeometry (FPoint{1, 2}, FSize(getWidth(), getHeight() - 1));
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scrolltext.setGeometry (FPoint{1, 2}, FSize(getWidth(), getHeight() - 1));
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}
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}
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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// class VMEngine
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// class VMEngine
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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@ -264,7 +267,7 @@ class VMEngine
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uc_engine *uc;
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uc_engine *uc;
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uc_err err;
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uc_err err;
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TextWindow *log;
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TextWindow *log;
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std::ostringstream out;
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std::stringstream out;
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};
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};
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VMEngine::VMEngine(TextWindow *log) : log(log)
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VMEngine::VMEngine(TextWindow *log) : log(log)
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@ -278,9 +281,93 @@ VMEngine::VMEngine(TextWindow *log) : log(log)
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log->append("Initialisation de l'ordinateur IA86");
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log->append("Initialisation de l'ordinateur IA86");
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}
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}
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//IP DI SI BP SP BX DX CX AX
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void VMEngine::Configure(State *init)
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void VMEngine::Configure(State *init)
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{
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{
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log->append("Configuration initiale de l'ordinateur IA86");
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out << "Configuration initiale de l'ordinateur IA86:\n ";
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err = uc_reg_write(uc, UC_X86_REG_EIP, &init->dump.regs.eip);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EIP");
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else
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if (init->dump.regs.eip != 0x00000000)
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if ((init->dump.regs.eip & 0xFFFF0000) == 0x00000000)
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out << " IP=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.ip << " ";
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else
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out << "EIP=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.eip << " ";
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err = uc_reg_write(uc, UC_X86_REG_EDI, &init->dump.regs.edi);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EDI");
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else
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if (init->dump.regs.edi != 0x00000000)
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if ((init->dump.regs.edi & 0xFFFF0000) == 0x00000000)
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out << " DI=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.di << " ";
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else
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out << "EDI=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.edi << " ";
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err = uc_reg_write(uc, UC_X86_REG_ESI, &init->dump.regs.esi);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: ESE");
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else
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if (init->dump.regs.esi != 0x00000000)
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if ((init->dump.regs.esi & 0xFFFF0000) == 0x00000000)
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out << " SI=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.si << " ";
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else
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out << "ESI=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.esi << " ";
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err = uc_reg_write(uc, UC_X86_REG_EBP, &init->dump.regs.ebp);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EBP");
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else
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if (init->dump.regs.ebp != 0x00000000)
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if ((init->dump.regs.ebp & 0xFFFF0000) == 0x00000000)
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out << " BP=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.bp << " ";
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else
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out << "EBP=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.ebp << " ";
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err = uc_reg_write(uc, UC_X86_REG_ESP, &init->dump.regs.esp);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: ESP");
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else
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if (init->dump.regs.esp != 0x00000000)
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if ((init->dump.regs.esp & 0xFFFF0000) == 0x00000000)
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out << " SP=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.sp << " ";
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else
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out << "ESP=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.esp << " ";
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err = uc_reg_write(uc, UC_X86_REG_EBX, &init->dump.regs.ebx);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EBX");
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else
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if (init->dump.regs.ebx != 0x00000000)
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if ((init->dump.regs.ebx & 0xFFFF0000) == 0x00000000)
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out << " BX=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.bx << " ";
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else
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out << "EBX=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.ebx << " ";
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err = uc_reg_write(uc, UC_X86_REG_EDX, &init->dump.regs.edx);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EDX");
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else
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if (init->dump.regs.edx != 0x00000000)
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if ((init->dump.regs.edx & 0xFFFF0000) == 0x00000000)
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out << " DX=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.dx << " ";
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else
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out << "EDX=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.edx << " ";
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err = uc_reg_write(uc, UC_X86_REG_ECX, &init->dump.regs.ecx);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: ECX");
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else
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if (init->dump.regs.ecx != 0x00000000)
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if ((init->dump.regs.ecx & 0xFFFF0000) == 0x00000000)
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out << " CX=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.cx << " ";
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else
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out << "ECX=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.ecx << " ";
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err = uc_reg_write(uc, UC_X86_REG_EAX, &init->dump.regs.eax);
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if (err != UC_ERR_OK)
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log->append("Impossible d'initialiser le registre: EAX");
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else
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if (init->dump.regs.eax != 0x00000000)
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if ((init->dump.regs.eax & 0xFFFF0000) == 0x00000000)
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out << " AX=" << std::uppercase << std::setfill('0') << std::setw(4) << std::hex << init->dump.regs.ax << " ";
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else
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out << "EAX=" << std::uppercase << std::setfill('0') << std::setw(8) << std::hex << init->dump.regs.eax << " ";
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log->append(out.str());
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}
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}
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void VMEngine::Run()
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void VMEngine::Run()
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@ -290,24 +377,7 @@ void VMEngine::Run()
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/*uc_mem_map(uc, ADDRESS, 1 * 1024 * 1024, UC_PROT_ALL);
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/*uc_mem_map(uc, ADDRESS, 1 * 1024 * 1024, UC_PROT_ALL);
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if (uc_mem_write(uc, ADDRESS, encode, sizecode)) {
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if (uc_mem_write(uc, ADDRESS, encode, sizecode)) {
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printf("Failed to write emulation code to memory, quit!\n");
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error=uc_emu_start(uc, ADDRESS, ADDRESS + sizecode, 0, 0);*/
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return -1;
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}
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uc_reg_write(uc, UC_X86_REG_CX, &r_cx);
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uc_reg_write(uc, UC_X86_REG_DX, &r_dx);
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uc_reg_read(uc, UC_X86_REG_IP, &r_ip);
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error=uc_emu_start(uc, ADDRESS, ADDRESS + sizecode, 0, 0);
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if (error) {
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printf("Failed on uc_emu_start() with error returned %u: %s\n",
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err, uc_strerror(error));
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}
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printf("Emulation done. Below is the CPU context\n");
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uc_reg_read(uc, UC_X86_REG_CX, &r_cx);
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uc_reg_read(uc, UC_X86_REG_DX, &r_dx);
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uc_reg_read(uc, UC_X86_REG_IP, &r_ip);
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printf(">>> CX = 0x%x\n", r_cx);
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printf(">>> DX = 0x%x\n", r_dx);
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printf(">>> IP = 0x%x\n", r_ip);*/
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//----------------------------------------------------------------------
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//----------------------------------------------------------------------
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// class Menu
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// class Menu
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@ -465,11 +535,11 @@ void Menu::loadGoal(Goal *g, VMEngine *vm)
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Goal goals[]={
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Goal goals[]={
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{
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{
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"L'instruction MOV et les registres","Le but est de bouger du registre AX au registre BX, l' ensemble des données", "Aide....",
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"L'instruction MOV et les registres","Le but est de bouger du registre AX au registre BX, l' ensemble des données", "Aide....", "mov ax,immédiat",
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{
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{
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{
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{
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{},
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{},
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{},
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{.bx=0x0002,.ax=0x1920},
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0x00000000
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0x00000000
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},
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},
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{}
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{}
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@ -503,7 +573,7 @@ int main (int argc, char* argv[])
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log.setText ("Journaux");
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log.setText ("Journaux");
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log.setGeometry ( FPoint { 30, 10 }, FSize{60, 12} );
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log.setGeometry ( FPoint { 30, 10 }, FSize{60, 12} );
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log.setResizeable();
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log.setResizeable();
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log.append("lancement des journaux");
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log.append("Lancement des journaux");
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log.show();
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log.show();
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finalcut::FWidget::setMainWidget (&main_dlg);
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finalcut::FWidget::setMainWidget (&main_dlg);
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main_dlg.show();
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main_dlg.show();
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