2018-09-28 20:35:51 +02:00
|
|
|
|
/*******************************************************************************/
|
|
|
|
|
/* COS2000 - Compatible Operating System - LGPL v3 - Hord<72> Nicolas */
|
|
|
|
|
/* */
|
2007-04-02 14:52:01 +02:00
|
|
|
|
#include "types.h"
|
2007-04-02 15:11:17 +02:00
|
|
|
|
|
2007-04-02 15:30:47 +02:00
|
|
|
|
/******************************************************************************/
|
|
|
|
|
|
|
|
|
|
#define sti() asm("sti"::)
|
|
|
|
|
|
|
|
|
|
#define cli() asm("cli"::)
|
|
|
|
|
|
|
|
|
|
#define nop() asm("nop"::)
|
|
|
|
|
|
2018-08-17 11:17:24 +02:00
|
|
|
|
#define pushad() asm("pushal"::)
|
|
|
|
|
|
|
|
|
|
#define popad() asm("popal"::)
|
|
|
|
|
|
|
|
|
|
#define pushf() asm("pushf"::)
|
|
|
|
|
|
|
|
|
|
#define popf() asm("popf"::)
|
|
|
|
|
|
2018-10-10 08:06:39 +02:00
|
|
|
|
#define getESP() ({ \
|
|
|
|
|
u32 _v; \
|
|
|
|
|
asm volatile ("movl %%esp,%%eax;": "=a" (_v)); \
|
|
|
|
|
_v; \
|
|
|
|
|
})
|
|
|
|
|
|
|
|
|
|
#define dumpcpu() asm("\
|
|
|
|
|
mov $0x6666666, %%eax \n \
|
|
|
|
|
mov $0x8888888, %%ebx \n \
|
|
|
|
|
pushal \n \
|
|
|
|
|
pushf \n \
|
|
|
|
|
pushl %%cs\n \
|
|
|
|
|
pushl $0x0\n \
|
|
|
|
|
pushl %%ds\n \
|
|
|
|
|
pushl %%es\n \
|
|
|
|
|
pushl %%fs\n \
|
|
|
|
|
pushl %%gs\n \
|
|
|
|
|
pushl %%ss\n \
|
|
|
|
|
pushl $0x0\n \
|
|
|
|
|
mov %%cr0, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%cr2, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%cr3, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%cr4, %%eax \n \
|
|
|
|
|
pushl %%eax \n \
|
|
|
|
|
mov %%dr0, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr1, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr2, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr3, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr4, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr5, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr6, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov %%dr7, %%eax \n \
|
|
|
|
|
pushl %%eax\n \
|
|
|
|
|
mov $0xC0000080, %%ecx \n \
|
|
|
|
|
rdmsr \n \
|
|
|
|
|
pushl %%edx \n \
|
|
|
|
|
pushl %%eax":::)
|
|
|
|
|
|
|
|
|
|
#define restcpu() asm("\
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%ss\n \
|
|
|
|
|
popl %%gs\n \
|
|
|
|
|
popl %%fs\n \
|
|
|
|
|
popl %%es\n \
|
|
|
|
|
popl %%ds\n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popl %%eax \n \
|
|
|
|
|
popf \n \
|
|
|
|
|
popal":::)
|
|
|
|
|
|
2018-08-17 11:17:24 +02:00
|
|
|
|
#define iret() asm("iret"::)
|
2007-04-02 15:30:47 +02:00
|
|
|
|
|
|
|
|
|
#define irqendmaster() asm("movb $0x20,%al; \
|
|
|
|
|
outb %al,$0x20;")
|
|
|
|
|
|
|
|
|
|
#define irqendslave() asm("movb $0x20,%al; \
|
|
|
|
|
outb %al,$0xA0;")
|
|
|
|
|
|
2018-08-31 02:48:03 +02:00
|
|
|
|
#define lidt(idtr) asm ("lidtl %0"::"m" (*idtr))
|
|
|
|
|
|
|
|
|
|
#define lgdt(gdtr) asm ("lgdtl %0"::"m" (*gdtr))
|
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define lldt(ldtr) asm ("lldtl %0"::"m" (*ldtr))
|
2018-08-31 02:48:03 +02:00
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define ltr(tss) asm volatile ("ltr %%ax":: "a" (tss))
|
2007-04-02 15:30:47 +02:00
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define sidt(idtr) asm ("sidtl %0"::"m" (*idtr))
|
2018-09-18 14:29:35 +02:00
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define sgdt(gdtr) asm ("sgdtl %0"::"m" (*gdtr))
|
2018-09-18 14:29:35 +02:00
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define sldt(ldtr) asm ("sldtl %0"::"m" (*ldtr))
|
2018-09-18 15:11:50 +02:00
|
|
|
|
|
2018-10-03 22:50:54 +02:00
|
|
|
|
#define str(tss) asm volatile ("str %%ax;\
|
|
|
|
|
mov %%ax,%0":: "m" (tss))
|
|
|
|
|
|
2018-10-04 14:55:41 +02:00
|
|
|
|
#define wrmsr(reg,low,high) asm volatile ("wrmsr" :: "c" (reg), "a" (low), "d" (high))
|
|
|
|
|
|
|
|
|
|
#define rdmsr(reg,low,high) asm volatile ("rdmsr" :: "=a" (low), "=d" (high) : "c" (reg) )
|
2018-10-03 22:50:54 +02:00
|
|
|
|
|
2007-04-02 15:30:47 +02:00
|
|
|
|
/******************************************************************************/
|
2007-04-02 14:52:01 +02:00
|
|
|
|
|
|
|
|
|
#define outb(port,value) \
|
|
|
|
|
asm volatile ("outb %%al,%%dx"::"d" (port), "a" (value));
|
|
|
|
|
|
|
|
|
|
#define outw(port,value) \
|
2007-04-02 14:55:34 +02:00
|
|
|
|
asm volatile ("outw %%ax,%%dx"::"d" (port), "a" (value));
|
2007-04-02 14:52:01 +02:00
|
|
|
|
|
2007-04-02 15:11:17 +02:00
|
|
|
|
#define outd(port,value) \
|
2007-04-02 15:30:47 +02:00
|
|
|
|
asm volatile ("outl %%eax,%%dx"::"d" (port), "a" (value));
|
|
|
|
|
|
|
|
|
|
/******************************************************************************/
|
2007-04-02 15:11:17 +02:00
|
|
|
|
|
2007-04-02 14:52:01 +02:00
|
|
|
|
#define inb(port) ({ \
|
|
|
|
|
u8 _v; \
|
|
|
|
|
asm volatile ("inb %%dx,%%al" : "=a" (_v) : "d" (port)); \
|
|
|
|
|
_v; \
|
|
|
|
|
})
|
|
|
|
|
|
|
|
|
|
#define inw(port) ({ \
|
|
|
|
|
u16 _v; \
|
|
|
|
|
asm volatile ("inw %%dx,%%ax" : "=a" (_v) : "d"(port)); \
|
|
|
|
|
_v; \
|
2007-04-02 15:11:17 +02:00
|
|
|
|
}
|
|
|
|
|
|
2007-04-02 15:30:47 +02:00
|
|
|
|
|
2007-04-02 15:11:17 +02:00
|
|
|
|
#define ind(port) ({ \
|
|
|
|
|
u32 _v; \
|
2007-04-02 15:30:47 +02:00
|
|
|
|
asm volatile ("inl %%dx,%%eax" : "=a" (_v) : "d"(port)); \
|
2007-04-02 15:11:17 +02:00
|
|
|
|
_v; \
|
|
|
|
|
}
|
|
|
|
|
|
2007-04-02 15:30:47 +02:00
|
|
|
|
/******************************************************************************/
|
|
|
|
|
|
|
|
|
|
/* pas termin<69> */
|
|
|
|
|
|
2007-04-02 15:11:17 +02:00
|
|
|
|
#define rolb(input,rotate) ({ \
|
|
|
|
|
u32 _v; \
|
|
|
|
|
asm volatile ("roll %1,%0" : "=g" (_v) : "cI" (rotate), "0" (input)); \
|
|
|
|
|
_v; \
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 20:35:51 +02:00
|
|
|
|
/******************************************************************************/
|
2007-04-02 15:30:47 +02:00
|
|
|
|
|