fix: ajout gestion erreur Pagefault plus fin + mécanisme pile exception
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@ -25,7 +25,7 @@ Sans système d'exploitation votre ordinateur est inopérant: c'est une boite vi
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COS2000 n'a pas pour but d'être utilisé en exploitation, c'est un système en cours de
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développement. Vous pouvez néanmoins l'utiliser sur un ordinateur physique ou une machine virtuelle
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afin de voir le fonctionnement d'un système rudimentatire. Voir compilation de COS2000...
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afin de voir le fonctionnement d'un système d'exploitation rudimentatire. Voir compilation de COS2000...
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#### Sur quel ordinateur fonctionne t'il ?
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@ -119,9 +119,9 @@ Pour tester l'OS en émulation taper donc la commande ```make test``` qui compil
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Il faut d'abord copier l'image sur une clé (Attention l'opération effacera le contenu de la clé) :
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```dd if=./final/harddisk.img.final of=/dev/sdx bs=1M``` (ou sdx est votre périphérique)
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```sudo dd if=./final/harddisk.img.final of=/dev/sdx bs=1M``` (ou sdx est votre périphérique)
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Bootez sur votre clé en mode bios (legacy). Il est possible que des dysfonctionnement apparaissent sur des machine x86_64 (en cours de résolution).
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Bootez sur votre clé en mode bios (legacy).
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##### Usage de COS2000
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@ -136,6 +136,7 @@ Pour l'instant quelques commandes seulement sont disponibles:
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* GDT affiche la table des descripteurs,
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* IDT affiche la table des interruptions,
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* INFO affiche des informations issues de GRUB.
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* PAGEFAULT génère une erreur de pagination.
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@ -1,6 +1,8 @@
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/*******************************************************************************/
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/* COS2000 - Compatible Operating System - LGPL v3 - Hordé Nicolas */
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/* */
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#include "interrupts.h"
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typedef struct cpuinfo
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{
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u8 vendor[13];
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@ -37,6 +39,9 @@ bool sse42;
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bool apic2;
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} cpuinfo __attribute__ ((packed));
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u8 getcpuinfos(cpuinfo *inf);
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bool cansetflag (u32 flag);
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void cpuid(u32 op, u32 *eax, u32 *ebx,u32 *ecx, u32 *edx);
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u8 getcpuinfos(cpuinfo *inf);
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u32 getESP(void);
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void dump_regs(exception_stack *stack);
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@ -1,8 +0,0 @@
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/*******************************************************************************/
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/* COS2000 - Compatible Operating System - LGPL v3 - Hordé Nicolas */
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/* */
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bool cansetflag (u32 flag);
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void cpuid(u32 op, u32 *eax, u32 *ebx,u32 *ecx, u32 *edx);
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void dump_regs(void);
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@ -3,6 +3,9 @@
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/* */
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#include "types.h"
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#ifndef _INTERRUPTS
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#define _INTERRUPTS
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#define PIC1_CMD 0x20 /*PIC 8259A Commandes n°1 */
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#define PIC1_DATA 0x21 /*PIC 8259A Données n°1 */
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#define PIC2_CMD 0xa0 /*PIC 8259A Commandes n°2 */
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@ -34,6 +37,20 @@
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#define TIMER_FREQ 1193180 /* fréquence pour timer dans un PC ou AT */
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#define HZ 100 /* Fréquence d'horloge (ajutste logiciellement sur IBM-PC) */
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/* exception pile */
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typedef struct exception_stack {
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u32 error_code;
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u32 eip;
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u32 cs;
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u32 eflags;
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} exception_stack __attribute__ ((packed));
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/* sans code erreur */
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typedef struct exception_stack_noerror {
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u32 eip;
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u32 cs;
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u32 eflags;
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} exception_stack_noerror __attribute__ ((packed));
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/* descripteur de segment */
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typedef struct idtdes {
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@ -55,8 +72,7 @@ struct idtr {
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void initpic(void);
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void enableirq(u8 irq);
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void disableirq(u8 irq);
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void cpuerror(const u8 *src);
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void cpuerror(const u8 * src, const exception_stack *stack);
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#endif
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@ -15,6 +15,6 @@ int readgdt();
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int detectcpu();
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int mode();
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int clear();
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int dump_regs();
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int regs();
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int info();
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int pagefault();
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35
lib/cpu.c
35
lib/cpu.c
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@ -3,7 +3,6 @@
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/* */
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#include "types.h"
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#include "cpu.h"
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#include "cpuid.h"
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#include "memory.h"
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#include "string.h"
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#include "asm.h"
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@ -127,19 +126,20 @@ u8 getcpuinfos(cpuinfo * proc)
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}
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/******************************************************************************/
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/* Retourne un élément de la pile */
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/* Retourne la tête de pile */
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u32 viewstack(u32 pointer)
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u32 getESP(void)
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{
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u32 stack = 0;
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asm("movl %[a1],%%ebp;" "movl (%%ebp), %[a1] ;": [result] "=r"(stack): [a1] "r"(pointer):"%ebp");
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asm("movl %%esp,%[result];": [result] "=r"(stack));
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return stack;
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}
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/******************************************************************************/
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/* Affiche les registres CPU */
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void dump_regs(void)
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void dump_regs(exception_stack *stack)
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{
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cli();
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u32 eax = 0;
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@ -150,6 +150,7 @@ void dump_regs(void)
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u32 edi = 0;
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u32 ebp = 0;
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u32 esp = 0;
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u32 eip = 0;
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u16 cs = 0;
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u16 ds = 0;
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u16 es = 0;
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@ -167,11 +168,20 @@ void dump_regs(void)
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[f1] "=m"(edi),[g1] "=m"(esp),[h1] "=m"(ebp),[i1] "=m"(cs),[j1] "=m"(ds),
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[k1] "=m"(es),[l1] "=m"(fs),[m1] "=m"(gs),[n1] "=m"(ss),[o1] "=m"(cr0),
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[p1] "=m"(cr2),[q1] "=m"(cr3),[r1] "=m"(cr4));
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if (stack!=0) {
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eip=stack->eip;
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eflags=stack->eflags;
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cs=stack->cs;
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esp=stack;
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printf("\033[0m");
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}
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else
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printf("\033[1mATTENTION PAS DE PILE ! REGISTRES INCERTAINS\r\n");
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printf("EAX=%X EBX=%X ECX=%X EDX=%X\r\n", eax, ebx, ecx, edx);
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printf("ESI=%X EDI=%X ESP=%X EBP=%X\r\n", esi, edi, esp, ebp);
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printf("EIP=%X\r\n", eip);
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printf
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("\033[1m CS=%hX DS=%hX ES=%hX FS=%hX GS=%hX SS=%hX\033[0m\r\n",
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("CS=%hX DS=%hX ES=%hX FS=%hX GS=%hX SS=%hX\r\n",
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(u32) cs, (u32) ds, (u32) es, (u32) fs, (u32) gs, (u32) ss);
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printf("CR0=%X CR1=N/A CR2=%X CR3=%X CR4=%X\r\n", cr0, cr2, cr3,
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cr4);
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@ -213,16 +223,15 @@ void dump_regs(void)
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printf("STACK\r\n");
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u32 i = 0;
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for (u32 pointer = esp; pointer < 0x400000; pointer += 4) {
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if (pointer == ebp)
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print("\033[1m\033[31m");
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printf("+%d:%X\t\t%X\033[0m\033[37m\r\n", i++, pointer,
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viewstack(pointer));
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if (i > 25) {
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for (u32 *pointer = esp; pointer < KERNEL_STACK_ADDR; pointer += 4) {
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printf("+%d:%X\t\t%X\r\n", i++, pointer,
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(u32)(*pointer));
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if (i > 5) {
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print("...\r\n");
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break;
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}
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}
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printf("\033[0m");
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sti();
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}
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/*******************************************************************************/
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@ -136,11 +136,10 @@ void putidt(u32 offset, u16 select, u16 type, u16 index)
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/******************************************************************************/
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/* Affiche une erreur CPU et fige l'ordinateur */
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void cpuerror(const u8 * src)
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void cpuerror(const u8 * src, const exception_stack *stack)
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{
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print("\033[31m***** ERREUR CPU ****\r\n -");
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print(src);
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dump_regs();
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printf("\033[31m*** ERREUR CPU : %s *** \r\n", src);
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dump_regs(stack);
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print("<Appuyer une touche pour continuer>\r\n");
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waitascii();
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initselectors(retry_address);
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@ -169,97 +168,125 @@ void interruption()
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void exception0()
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{
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print("divide error\r\n");
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cpuerror("divide error",0x0);
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}
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void exception1()
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{
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cpuerror("debug exception\r\n");
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cpuerror("debug exception",0x0);
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}
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void exception2()
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{
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cpuerror("non-maskable hardware interrupt\r\n");
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cpuerror("non-maskable hardware interrupt",0x0);
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}
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void exception3()
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{
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cpuerror("INT3 instruction\r\n");
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cpuerror("INT3 instruction",0x0);
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}
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void exception4()
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{
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cpuerror("INTO instruction detected overflow\r\n");
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cpuerror("INTO instruction detected overflow",0x0);
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}
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void exception5()
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{
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print("BOUND instruction detected overrange\r\n");
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cpuerror("BOUND instruction detected overrange",0x0);
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}
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void exception6()
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{
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cpuerror("invalid instruction opcode\r\n");
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cpuerror("invalid instruction opcode",0x0);
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}
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void exception7()
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{
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cpuerror("no coprocessor\r\n");
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cpuerror("no coprocessor",0x0);
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}
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void exception8()
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{
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cpuerror("double fault\r\n");
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cpuerror("double fault",0x0);
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}
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void exception9()
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{
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cpuerror("coprocessor segment overrun\r\n");
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cpuerror("coprocessor segment overrun",0x0);
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}
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void exception10()
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{
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cpuerror("invalid task state segment (TSS)\r\n");
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cpuerror("invalid task state segment (TSS)",0x0);
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}
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void exception11()
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{
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cpuerror("segment not present\r\n");
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cpuerror("segment not present",0x0);
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}
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void exception12()
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{
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cpuerror("stack fault");
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cpuerror("stack fault",0x0);
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}
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void exception13()
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{
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cpuerror("general protection fault (GPF)\r\n");
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cpuerror("general protection fault (GPF)",0x0);
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}
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void exception14()
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{
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cpuerror("page fault\r\n");
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exception_stack *stack = getESP()+0x30;
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u8 *errorstring;
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switch (stack->error_code) {
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case 0:
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errorstring="page fault - Supervisory process tried to read a non-present page entry";
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break;
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case 1:
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errorstring="Page fault - Supervisory process tried to read a page and caused a protection fault";
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break;
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case 2:
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errorstring="Page fault - Supervisory process tried to write to a non-present page entry";
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break;
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case 3:
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errorstring="Page fault - Supervisory process tried to write a page and caused a protection fault";
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break;
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case 4:
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errorstring="Page fault - User process tried to read a non-present page entry";
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break;
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case 5:
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errorstring="Page fault - User process tried to read a page and caused a protection fault";
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break;
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case 6:
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errorstring="Page fault - User process tried to write to a non-present page entry";
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break;
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case 7:
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errorstring="Page fault - User process tried to write a page and caused a protection fault";
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break;
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}
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cpuerror(errorstring,stack);
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}
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void exception15()
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{
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cpuerror("(reserved)\r\n");
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cpuerror("(reserved)",0x0);
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}
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void exception16()
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{
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cpuerror("coprocessor error\r\n");
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cpuerror("coprocessor error",0x0);
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}
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void exception17()
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{
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cpuerror("alignment check\r\n");
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cpuerror("alignment check",0x0);
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}
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void exception18()
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{
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cpuerror("machine check");
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cpuerror("machine check",0x0);
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}
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/******************************************************************************/
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@ -18,7 +18,7 @@ static command commands[] = {
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{"MODE" , "", &mode},
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{"DETECTCPU" , "", &detectcpu},
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{"TEST2D" , "", &test2d},
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{"REGS" , "", &dump_regs},
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{"REGS" , "", ®s},
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{"GDT" , "", &readgdt},
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{"IDT" , "", &readidt},
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{"INFO" , "", &info},
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@ -60,7 +60,7 @@ void shell()
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/* Génère une erreur de page à l'adresse 0xE0000000 */
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int pagefault()
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{
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print("*** Creation d'une erreur de page ***\r\n");
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print("Creation d'une erreur de page !\r\n");
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asm("mov $0x66666666, %eax \n \
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mov %eax,0xE0000000");
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}
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@ -78,7 +78,7 @@ int info()
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int regs()
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{
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dump_regs();
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dump_regs(0x0);
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return 0;
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}
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