303 lines
7.6 KiB
C
303 lines
7.6 KiB
C
/*******************************************************************************/
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/* COS2000 - Compatible Operating System - LGPL v3 - Hordé Nicolas */
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/* */
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#include "types.h"
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#include "asm.h"
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#ifndef _INTERRUPTS
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#define _INTERRUPTS
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#define PIC1_CMD 0x20 /*PIC 8259A Commandes n°1 */
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#define PIC1_DATA 0x21 /*PIC 8259A Données n°1 */
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#define PIC2_CMD 0xa0 /*PIC 8259A Commandes n°2 */
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#define PIC2_DATA 0xa1 /*PIC 8259A Données n°1 */
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#define ICW1_ICW4 0x01 /* ICW4 ou pas*/
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#define ICW1_SINGLE 0x02 /* mode seul ou cascadé */
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#define ICW1_INTERVAL4 0x04 /* adresses appel d'interval 4 ou 8 */
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#define ICW1_LEVEL 0x08 /* déclenchement sur niveau ou sur front */
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#define ICW1_INIT 0x10 /* Initialization */
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#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
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#define ICW4_AUTO 0x02 /* Auto EOI ou normal */
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#define ICW4_BUF_SLAVE 0x08 /* mode/slave avec tampon*/
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#define ICW4_BUF_MASTER 0x0C /* mode/master avec tampon*/
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#define ICW4_SFNM 0x10 /* Complètement lié ou non */
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#define INTGATE 0x0E00 /* utilise pour gerer les interruptions */
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#define TRAPGATE 0x0F00 /* utilise pour faire des appels systemes */
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#define TASKGATE 0x0500 /* utilise pour commuter des taches */
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#define CALLGATE 0x0C00 /* utilise pour appeler du code */
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#define LDTDES 0x0200 /* utilise pour pointer une LDT */
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#define ENTRY_PRESENT 0b1000000000000000 /* Segment défini (obligatoire) */
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#define ENTRY_STORAGE 0b0001000000000000 /* Segment défini (obligatoire) */
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#define ENTRY_RING0 0b0000000000000000 /* Segment anneau 0 */
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#define ENTRY_RING1 0b0010000000000000 /* Segment anneau 1 */
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#define ENTRY_RING2 0b0100000000000000 /* Segment anneau 2 */
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#define ENTRY_RING3 0b0110000000000000 /* Segment anneau 3 */
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/* 00-11-010-0 : Compteur 0 - LSB puis MSB - generateur taux - binaire */
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#define TIMER0 0x40 /* port E/S pour le timer canal 0 */
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#define TIMER_MODE 0x43 /* port E/S pour le mode controle du timer */
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#define RATE_GENERATOR 0x34 /* générateur de fréquence */
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#define SQUARE_WAVE 0x36 /* générateur d'onde carrée */
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#define TIMER_FREQ 1193180 /* fréquence pour timer dans un PC ou AT */
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#define HZ 100 /* Fréquence d'horloge (ajutste logiciellement sur IBM-PC) */
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#define getESP(mem) ({ \
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asm volatile ("movl %%esp,%[tomem];":: [tomem] "m" (mem)); \
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})
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#define getEBP(mem) ({ \
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asm volatile ("movl %%ebp,%[tomem];":: [tomem] "m" (mem)); \
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})
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#define createdump(dump) ({ \
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push(dump.ss);\
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push(dump.esp);\
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push(dump.eflags);\
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push(dump.cs);\
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push(dump.eip);\
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push(dump.ds);\
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push(dump.es);\
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push(dump.fs);\
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push(dump.gs);\
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push(dump.eax);\
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push(dump.ebx);\
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push(dump.ecx);\
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push(dump.edx);\
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push(dump.esi);\
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push(dump.edi);\
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push(dump.ebp);\
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push(dump.cr0);\
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push(dump.cr2);\
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push(dump.cr3);\
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push(dump.cr4);\
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push(dump.dr0);\
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push(dump.dr1);\
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push(dump.dr2);\
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push(dump.dr3);\
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push(dump.dr6);\
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push(dump.dr7);\
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u32 eferlow=(u32) dump.efer & 0xFFFF;\
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u32 eferhigh=(u32) dump.efer >> 32;\
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push(eferlow);\
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push(eferhigh);\
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})
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#define dumpcpu() ({ \
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asm("\
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pushl %%ss\n \
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pushl %%esp\n \
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pushf \n \
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pushl %%cs\n \
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pushl $0x0\n \
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pushl %%ds\n \
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pushl %%es\n \
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pushl %%fs\n \
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pushl %%gs\n \
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pushl %%eax\n \
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pushl %%ebx\n \
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pushl %%ecx\n \
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pushl %%edx\n \
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pushl %%esi\n \
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pushl %%edi\n \
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pushl %%ebp\n \
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mov %%cr0, %%eax \n \
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pushl %%eax\n \
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mov %%cr2, %%eax \n \
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pushl %%eax\n \
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mov %%cr3, %%eax \n \
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pushl %%eax\n \
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mov %%cr4, %%eax \n \
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pushl %%eax \n \
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mov %%dr0, %%eax \n \
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pushl %%eax\n \
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mov %%dr1, %%eax \n \
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pushl %%eax\n \
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mov %%dr2, %%eax \n \
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pushl %%eax\n \
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mov %%dr3, %%eax \n \
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pushl %%eax\n \
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mov %%dr6, %%eax \n \
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pushl %%eax\n \
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mov %%dr7, %%eax \n \
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pushl %%eax\n \
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mov $0xC0000080, %%ecx \n \
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rdmsr \n \
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pushl %%edx \n \
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pushl %%eax":::);\
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})
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#define restcpu() ({\
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asm("\
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popl %%eax \n \
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popl %%edx \n \
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mov $0xC0000080, %%ecx \n \
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wrmsr\n \
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popl %%eax\n \
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mov %%eax,%%dr7 \n \
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popl %%eax \n \
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mov %%eax,%%dr6 \n \
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popl %%eax \n \
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mov %%eax,%%dr3 \n \
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popl %%eax \n \
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mov %%eax,%%dr2 \n \
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popl %%eax \n \
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mov %%eax,%%dr1 \n \
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popl %%eax \n \
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mov %%eax,%%dr0 \n \
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popl %%eax \n \
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popl %%eax \n \
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mov %%eax,%%cr3 \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%ebp\n \
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popl %%edi\n \
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popl %%esi\n \
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popl %%edx\n \
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popl %%ecx\n \
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popl %%ebx\n \
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popl %%eax\n \
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popl %%gs\n \
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popl %%fs\n \
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popl %%es\n \
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popl %%ds\n \"::);\
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})
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#define restdebugcpu() ({\
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asm("\
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popl %%eax \n \
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popl %%edx \n \
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mov $0xC0000080, %%ecx \n \
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wrmsr\n \
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popl %%eax\n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%eax \n \
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mov %%eax,%%cr3 \n \
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popl %%eax \n \
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popl %%eax \n \
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popl %%ebp\n \
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popl %%edi\n \
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popl %%esi\n \
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popl %%edx\n \
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popl %%ecx\n \
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popl %%ebx\n \
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popl %%eax\n \
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popl %%gs\n \
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popl %%fs\n \
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popl %%es\n \
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popl %%ds":::);\
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})
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/*
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lors d'un iret en mode user:
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pushl %%ss\n \
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pushl %%esp\n \
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lors d'un iret en mode kernel:
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pushf \n \
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pushl $cs\n \
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pushl $0x0\
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*/
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/* save pile */
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typedef struct regs {
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u64 efer;
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u32 dr7;
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u32 dr6;
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u32 dr3;
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u32 dr2;
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u32 dr1;
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u32 dr0;
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u32 cr4;
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u32 cr3;
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u32 cr2;
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u32 cr0;
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u32 ebp;
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u32 edi;
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u32 esi;
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u32 edx;
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u32 ecx;
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u32 ebx;
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u32 eax;
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u32 gs;
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u32 fs;
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u32 es;
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u32 ds;
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u32 eip;
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u32 cs;
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u32 eflags;
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u32 esp;
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u32 ss;
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} regs __attribute__ ((packed));
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/* exception pile depuis code kernel*/
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typedef struct exception_stack {
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u32 error_code;
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u32 eip;
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u32 cs;
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u32 eflags;
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} exception_stack __attribute__ ((packed));
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/* sans code erreur depuis code kernel*/
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typedef struct exception_stack_noerror {
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u32 eip;
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u32 cs;
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u32 eflags;
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} exception_stack_noerror __attribute__ ((packed));
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/* exception pile depuis code user */
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typedef struct exception_stack_user {
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u32 error_code;
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u32 eip;
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u32 cs;
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u32 eflags;
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u32 esp;
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u32 ss;
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} exception_stack_user __attribute__ ((packed));
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/* sans code erreu depuis code user */
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typedef struct exception_stack_noerror_user {
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u32 eip;
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u32 cs;
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u32 eflags;
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u32 esp;
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u32 ss;
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} exception_stack_noerror_user __attribute__ ((packed));
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/* descripteur de segment */
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typedef struct idtdes {
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u16 offset0_15;
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u16 select;
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u16 type;
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u16 offset16_31;
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} idtdes __attribute__ ((packed));
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struct idtr {
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u16 limite;
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u32 base;
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} __attribute__ ((packed));
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void initretry(u32 address);
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void initidt(void);
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u32 getinitretry(void);
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void setidt(u32 offset, u16 select, u16 type,u16 index);
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void makeidtdes(u32 offset, u16 select, u16 type, idtdes* desc);
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void initpic(void);
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void enableirq(u8 irq);
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void disableirq(u8 irq);
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void cpuerror(const u8 * src, const regs *stack);
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#endif
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