276 lines
8.4 KiB
C
276 lines
8.4 KiB
C
/*******************************************************************************/
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/* COS2000 - Compatible Operating System - LGPL v3 - Hordé Nicolas */
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/* */
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#include "interrupts.h"
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#include "types.h"
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#include "asm.h"
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#include "memory.h"
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#include "video.h"
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#include "gdt.h"
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#include "system.h"
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#include "debug.h"
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#include "process.h"
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#include "handlers.h"
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#define IDT_SIZE 256 /* nombre de descripteurs */
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/* registre idt */
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static struct idtr idtreg;
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/* table de IDT */
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static idtdes idt[IDT_SIZE];
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static u32 retry_address;
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extern wrapper_exception0;
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extern wrapper_exception1;
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extern wrapper_exception2;
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extern wrapper_exception3;
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extern wrapper_exception4;
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extern wrapper_exception5;
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extern wrapper_exception6;
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extern wrapper_exception7;
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extern wrapper_exception8;
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extern wrapper_exception9;
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extern wrapper_exception10;
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extern wrapper_exception11;
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extern wrapper_exception12;
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extern wrapper_exception13;
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extern wrapper_exception14;
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extern wrapper_exception15;
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extern wrapper_exception16;
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extern wrapper_exception17;
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extern wrapper_exception18;
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/******************************************************************************/
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/* Initialise la reprise après erreur */
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void initretry(u32 address)
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{
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retry_address = address;
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}
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/******************************************************************************/
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/* Récupère l'adresse de reprise après erreur */
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u32 getinitretry(void)
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{
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return retry_address;
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}
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/******************************************************************************/
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/* Initialise le controleur d'interruption 8259A */
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void initpic(void)
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{
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/* MASTER */
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/* Initialisation de ICW1 */
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outb(PIC1_CMD, ICW1_INIT + ICW1_ICW4);
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nop();
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/* Initialisation de ICW2 - vecteur de depart = 32 */
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outb(PIC1_DATA, 0x20);
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nop();
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/* Initialisation de ICW3 */
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outb(PIC1_DATA, 0x04);
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nop();
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/* Initialisation de ICW4 */
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outb(PIC1_DATA, ICW4_8086);
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nop();
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/* masquage des interruptions */
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outb(PIC1_DATA, 0xFF);
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nop();
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/* SLAVE */
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/* Initialisation de ICW1 */
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outb(PIC2_CMD, ICW1_INIT + ICW1_ICW4);
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nop();
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/* Initialisation de ICW2 - vecteur de depart = 96 */
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outb(PIC2_DATA, 0x60);
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nop();
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/* Initialisation de ICW3 */
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outb(PIC2_DATA, 0x02);
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nop();
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/* Initialisation de ICW4 */
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outb(PIC2_DATA, ICW4_8086);
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nop();
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/* masquage des interruptions */
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outb(PIC2_DATA, 0xFF);
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nop();
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/* Demasquage des irqs sauf clavier
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outb(PIC1_DATA,0xFD);
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nop();
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*/
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}
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/******************************************************************************/
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/* Active une IRQ */
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void enableirq(u8 irq)
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{
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u16 port;
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cli();
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port = (((irq & 0x08) << 4) + PIC1_DATA);
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outb(port, inb(port) & ~(1 << (irq & 7)));
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sti();
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}
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/******************************************************************************/
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/* Désactive une IRQ */
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void disableirq(u8 irq)
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{
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u16 port;
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cli();
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port = (((irq & 0x08) << 4) + PIC1_DATA);
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outb(port, inb(port) | (1 << (irq & 7)));
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sti();
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}
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/******************************************************************************/
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/* Créé un descripteur pour l'IDT */
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void makeidtdes(u32 offset, u16 select, u16 type, idtdes * desc)
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{
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desc->offset0_15 = (offset & 0xffff);
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desc->select = select;
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desc->type = type;
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desc->offset16_31 = (offset & 0xffff0000) >> 16;
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return;
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}
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/******************************************************************************/
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/* Change une entrée dans l'IDT */
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void setidt(u32 offset, u16 select, u16 type, u16 index)
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{
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cli();
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idtdes *desc;
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desc = idtreg.base;
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desc[index].offset0_15 = (offset & 0xffff);
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desc[index].select = select;
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desc[index].type = type;
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desc[index].offset16_31 = (offset & 0xffff0000) >> 16;
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sti();
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}
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/******************************************************************************/
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/* Met une entrée dans l'IDT */
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void putidt(u32 offset, u16 select, u16 type, u16 index)
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{
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idtdes temp;
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makeidtdes(offset, select, type, &temp);
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idt[index] = temp;
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}
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/******************************************************************************/
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/* Initialise une IDT */
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void initidt(void)
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{
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u16 i;
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putidt((u32) &wrapper_exception0, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 0);
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putidt((u32) &wrapper_exception1, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 1);
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putidt((u32) &wrapper_exception2, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 2);
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putidt((u32) &wrapper_exception3, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 3);
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putidt((u32) &wrapper_exception4, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 4);
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putidt((u32) &wrapper_exception5, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 5);
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putidt((u32) &wrapper_exception6, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 6);
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putidt((u32) &wrapper_exception7, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 7);
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putidt((u32) &wrapper_exception8, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 8);
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putidt((u32) &wrapper_exception9, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 9);
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putidt((u32) &wrapper_exception10, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 10);
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putidt((u32) &wrapper_exception11, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 11);
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putidt((u32) &wrapper_exception12, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 12);
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putidt((u32) &wrapper_exception13, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 13);
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putidt((u32) &wrapper_exception14, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 14);
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putidt((u32) &wrapper_exception15, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 15);
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putidt((u32) &wrapper_exception16, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 16);
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putidt((u32) &wrapper_exception17, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 17);
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putidt((u32) &wrapper_exception18, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 18);
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for (i = 19; i < 32; i++)
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{
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putidt((u32) interruption, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING3 | TRAPGATE, i);
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}
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putidt((u32) irq0, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 32);
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putidt((u32) irq1, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 33);
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putidt((u32) irq2, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 34);
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putidt((u32) irq3, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 35);
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putidt((u32) irq4, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 36);
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putidt((u32) irq5, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 37);
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putidt((u32) irq6, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 38);
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putidt((u32) irq7, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 39);
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for (i = 40; i < 96; i++)
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{
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putidt((u32) interruption, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING3 | TRAPGATE, i);
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}
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putidt((u32) irq8, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 96);
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putidt((u32) irq9, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 97);
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putidt((u32) irq10, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 98);
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putidt((u32) irq11, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 99);
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putidt((u32) irq12, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 100);
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putidt((u32) irq13, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 101);
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putidt((u32) irq14, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 102);
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putidt((u32) irq15, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | INTGATE, 103);
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for (i = 104; i < IDT_SIZE; i++)
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{
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putidt((u32) interruption, SEL_KERNEL_CODE,
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ENTRY_PRESENT | ENTRY_RING0 | TRAPGATE, i);
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}
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/* initialise le registre idt */
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idtreg.limite = IDT_SIZE * sizeof(idtdes);
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idtreg.base = IDT_ADDR;
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/* recopie de la IDT a son adresse */
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memcpy(&idt, (u8 *) idtreg.base, idtreg.limite, 1);
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/* chargement du registre IDTR */
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lidt(&idtreg);
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}
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/******************************************************************************/
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/* 8253/8254 PIT (Programmable Interval Timer) Timer ajustable */
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void inittimer(void)
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{
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u32 divisor = TIMER_FREQ / HZ;
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outb(TIMER_MODE, RATE_GENERATOR);
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outb(TIMER0, (u8) divisor);
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outb(TIMER0, (u8) (divisor >> 8));
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}
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/*******************************************************************************/
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